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Merged
lenticularis39 merged 5 commits into from
Jan 21, 2021
Merged

Promovicz patches #56

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4ab86d3
vaxfloat needs to interpret the input as signed. Was: https://github.…
Jan 21, 2021
38d8c6c
Signed mismatch. Was: https://github.com/retroprom/es40/commit/f41628…
Jan 21, 2021
9c4c1f0
Modernize number handling in NumberFormatter. Was: https://github.com…
Jan 21, 2021
2b2bffd
use inttypes everywhere. Was: https://github.com/retroprom/es40/commi…
Jan 21, 2021
c1d7d3c
Typo
Jan 21, 2021
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8 changes: 4 additions & 4 deletions src/AliM1543C.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -875,7 +875,7 @@ void CAliM1543C::toy_update_irqf() {
**/
u8 CAliM1543C::pit_read(u32 address) {

// printf("PIT Read: %02" LL "x \n",address);
// printf("PIT Read: %02" PRIx64 " \n",address);
u8 data;
data = 0;
return data;
Expand All @@ -886,7 +886,7 @@ u8 CAliM1543C::pit_read(u32 address) {
**/
void CAliM1543C::pit_write(u32 address, u8 data) {

// printf("PIT Write: %02" LL "x, %02x \n",address,data);
// printf("PIT Write: %02" PRIx64 ", %02x \n",address,data);
if (address == 3) { // control
if (data != 0) {
state.pit_status[address] = data; // last command seen.
Expand Down Expand Up @@ -1035,7 +1035,7 @@ u8 CAliM1543C::pic_read(int index, u32 address) {

#ifdef DEBUG_PIC
if (pic_messages)
printf("%%PIC-I-READ: read %02x from port %" LL "d on PIC %d\n", data,
printf("%%PIC-I-READ: read %02x from port %" PRId64 " on PIC %d\n", data,
address, index);
#endif
return data;
Expand Down Expand Up @@ -1097,7 +1097,7 @@ void CAliM1543C::pic_write(int index, u32 address, u8 data) {
int op;
#ifdef DEBUG_PIC
if (pic_messages)
printf("%%PIC-I-WRITE: write %02x to port %" LL "d on PIC %d\n", data,
printf("%%PIC-I-WRITE: write %02x to port %" PRId64 " on PIC %d\n", data,
address, index);
#endif
switch (address) {
Expand Down
4 changes: 2 additions & 2 deletions src/AliM1543C_ide.cpp
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Expand Up @@ -1134,9 +1134,9 @@ void CAliM1543C_ide::ide_busmaster_write(int index, u32 address, u32 data,
CONTROLLER(index).busmaster[address] = data;
prd_address = endian_32(*(u32 *)(&CONTROLLER(index).busmaster[4]));
#ifdef DEBUG_IDE_BUSMASTER
printf("%%IDE-I-PRD: Virtual address: %" LL "x \n",
printf("%%IDE-I-PRD: Virtual address: %" PRIx64 " \n",
endian_32(*(u32 *)(&CONTROLLER(index).busmaster[4])));
printf("-IDE-I-PRD: Physical address: %" LL "x \n", prd_address);
printf("-IDE-I-PRD: Physical address: %" PRIx64 " \n", prd_address);
u32 base, control;
do {
do_pci_read(prd_address, &base, 4, 1);
Expand Down
28 changes: 14 additions & 14 deletions src/AlphaCPU.cpp
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Expand Up @@ -542,13 +542,13 @@ void CAlphaCPU::check_state() {

if (ce_new != ce) {

// printf(" time %12" LL "d | prev
// %12" LL "d \n",time,prev_time); printf(" count lapse %12"
// LL "d | curr %12" LL "d | prev %12" LL "d
// \n",icount_lapse,icount,prev_icount); printf("cc %12" LL "d | aim
// %12" LL "d | diff %12" LL "d | prev %12" LL "d
// \n",cc,cc_aim,cc_diff,prev_cc); printf("ce %12" LL "d | aim %12" LL
// "d | diff %12" LL "d | new %12" LL "d
// printf(" time %12" PRId64 " | prev
// %12" PRId64 " \n",time,prev_time); printf(" count lapse %12"
// LL "d | curr %12" PRId64 " | prev %12" PRId64 "
// \n",icount_lapse,icount,prev_icount); printf("cc %12" PRId64 " | aim
// %12" PRId64 " | diff %12" PRId64 " | prev %12" PRId64 "
// \n",cc,cc_aim,cc_diff,prev_cc); printf("ce %12" PRId64 " | aim %12" LL
// "d | diff %12" PRId64 " | new %12" PRId64 "
// \n",ce,ce_aim,ce_diff,ce_new);
// printf("==========================================================================
// \n");
Expand Down Expand Up @@ -1517,7 +1517,7 @@ void CAlphaCPU::listing(u64 from, u64 to) { listing(from, to, 0); }
* \param mark Address of instruction to be underlined with a marker line.
**/
void CAlphaCPU::listing(u64 from, u64 to, u64 mark) {
printf("%%CPU-I-LISTNG: Listing from %016" LL "x to %016" LL "x\n", from, to);
printf("%%CPU-I-LISTNG: Listing from %016" PRIx64 " to %016" PRIx64 "\n", from, to);

u64 iSavedPC;
bool bSavedDebug;
Expand Down Expand Up @@ -1718,7 +1718,7 @@ int CAlphaCPU::virt2phys(u64 virt, u64 *phys, int flags, bool *asm_bit,
#if defined(IDB)
if (bTB_Debug)
#endif
printf("TB %" LL "x,%x: ", virt, flags);
printf("TB %" PRIx64 ",%x: ", virt, flags);
#endif

// try superpage first.
Expand Down Expand Up @@ -1971,7 +1971,7 @@ int CAlphaCPU::virt2phys(u64 virt, u64 *phys, int flags, bool *asm_bit,
#if defined(IDB)
if (bTB_Debug)
#endif
printf("phys: %" LL "x - OK\n", *phys);
printf("phys: %" PRIx64 " - OK\n", *phys);
#endif
return 0;
}
Expand Down Expand Up @@ -2070,10 +2070,10 @@ void CAlphaCPU::add_tb(u64 virt, u64 pte_phys, u64 pte_flags, int flags) {
#endif
{
printf("Add TB---------------------------------------\n");
printf("Map VIRT %016" LL "x\n", state.tb[i].virt);
printf("Matching %016" LL "x\n", state.tb[i].match_mask);
printf("And keeping %016" LL "x\n", state.tb[i].keep_mask);
printf("To PHYS %016" LL "x\n", state.tb[i].phys);
printf("Map VIRT %016" PRIx64 "\n", state.tb[i].virt);
printf("Matching %016" PRIx64 "\n", state.tb[i].match_mask);
printf("And keeping %016" PRIx64 "\n", state.tb[i].keep_mask);
printf("To PHYS %016" PRIx64 "\n", state.tb[i].phys);
printf("Read : %c%c%c%c %c\n", state.tb[i].access[0][0] ? 'K' : '-',
state.tb[i].access[0][1] ? 'E' : '-',
state.tb[i].access[0][2] ? 'S' : '-',
Expand Down
9 changes: 5 additions & 4 deletions src/AlphaCPU_vaxfloat.cpp
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Expand Up @@ -107,7 +107,7 @@ u64 CAlphaCPU::vax_ldf(u32 op) {
(((u64)exp) << FPR_V_EXP) |
(((u64)SWAP_VAXF(op & ~(F_SIGN | F_EXP))) << F_V_FRAC);

// printf("vax_ldf: %08x -> %016" LL "x.\n", op, res);
// printf("vax_ldf: %08x -> %016" PRIx64 ".\n", op, res);
return res;
}

Expand Down Expand Up @@ -146,7 +146,7 @@ u32 CAlphaCPU::vax_stf(u64 op) {

u32 res = sign | exp | (SWAP_VAXF(frac) & ~(F_SIGN | F_EXP));

// printf("vax_stf: %016" LL "x -> %08x.\n", op, res);
// printf("vax_stf: %016" PRIx64 " -> %08x.\n", op, res);
return res;
}

Expand Down Expand Up @@ -206,11 +206,12 @@ int CAlphaCPU::vax_fcmp(u64 s1, u64 s2, u32 ins) {
* \return 64-bit VAX floating in register format.
**/
u64 CAlphaCPU::vax_cvtif(u64 val, u32 ins, u32 dp) {
s64 num = (s64)val;
UFP a;

if (val == 0)
if (num == 0)
return 0; /* 0? return +0 */
if (val < 0) { /* < 0? */
if (num < 0) { /* < 0? */
a.sign = 1; /* set sign */
val = NEG_Q(val);
} /* |val| */
Expand Down
4 changes: 2 additions & 2 deletions src/AlphaSim.cpp
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Expand Up @@ -367,12 +367,12 @@ int main_sim(int argc, char *argv[]) {
if (PROFILE_BUCKET(p_i) > p_max)
p_max = PROFILE_BUCKET(p_i);
}
fprintf(p_fp, "p_max = %10" LL "d; %10" LL "d profiled instructions.\n\n",
fprintf(p_fp, "p_max = %10" PRId64 "; %10" PRId64 " profiled instructions.\n\n",
p_max, profiled_insts);
for (p_i = PROFILE_FROM; p_i < PROFILE_TO;
p_i += (4 * PROFILE_BUCKSIZE)) {
if (PROFILE_BUCKET(p_i)) {
fprintf(p_fp, "%016" LL "x: %10" LL "d ", p_i, PROFILE_BUCKET(p_i));
fprintf(p_fp, "%016" PRIx64 ": %10" PRId64 " ", p_i, PROFILE_BUCKET(p_i));
for (p_j = 0;
p_j < (((float)PROFILE_BUCKET(p_i) / (float)p_max) * 100); p_j++)
fprintf(p_fp, "*");
Expand Down
14 changes: 7 additions & 7 deletions src/Cirrus.cpp
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Expand Up @@ -663,7 +663,7 @@ int CCirrus::RestoreState(FILE *f) {
u32 CCirrus::mem_read(u32 address, int dsize) {
u32 data = 0;

// printf("cirrus: mem read: %" LL "x, %d, %" LL "x \n", address, dsize,
// printf("cirrus: mem read: %" PRIx64 ", %d, %" PRIx64 " \n", address, dsize,
// data);
return data;
}
Expand All @@ -675,7 +675,7 @@ u32 CCirrus::mem_read(u32 address, int dsize) {
**/
void CCirrus::mem_write(u32 address, int dsize, u32 data) {

// printf("cirrus: mem write: %" LL "x, %d, %" LL "x \n", address, dsize,
// printf("cirrus: mem write: %" PRIx64 ", %d, %" PRIx64 " \n", address, dsize,
// data);
switch (dsize) {
case 8:
Expand Down Expand Up @@ -704,7 +704,7 @@ u32 CCirrus::legacy_read(u32 address, int dsize) {
data |= (u64)vga_mem_read((u32)address + 0xA0000);
}

// //printf("cirrus: legacy read: %" LL "x, %d, %" LL "x \n", address,
// //printf("cirrus: legacy read: %" PRIx64 ", %d, %" PRIx64 " \n", address,
// dsize, data);
return data;
}
Expand All @@ -716,7 +716,7 @@ u32 CCirrus::legacy_read(u32 address, int dsize) {
**/
void CCirrus::legacy_write(u32 address, int dsize, u32 data) {

// //printf("cirrus: legacy write: %" LL "x, %d, %" LL "x \n", address,
// //printf("cirrus: legacy write: %" PRIx64 ", %d, %" PRIx64 " \n", address,
// dsize, data);
switch (dsize) {
case 32:
Expand Down Expand Up @@ -751,7 +751,7 @@ u32 CCirrus::rom_read(u32 address, int dsize) {
break;
}

// printf("cirrus: rom read: %" LL "x, %d, %" LL "x\n", address,
// printf("cirrus: rom read: %" PRIx64 ", %d, %" PRIx64 "\n", address,
// dsize,data);
} else {
printf("cirrus: (BAD) rom read: %" PRIu32 "x, %d, %" PRIu32 "x\n", address,
Expand Down Expand Up @@ -829,7 +829,7 @@ u32 CCirrus::io_read(u32 address, int dsize) {
FAILURE_1(NotImplemented, "Unhandled port %x read", address);
}

// printf("cirrus: io read: %" LL "x, %d, %" LL "x \n", address+VGA_BASE,
// printf("cirrus: io read: %" PRIx64 ", %d, %" PRIx64 " \n", address+VGA_BASE,
// dsize, data);
return data;
}
Expand All @@ -841,7 +841,7 @@ u32 CCirrus::io_read(u32 address, int dsize) {
*/
void CCirrus::io_write(u32 address, int dsize, u32 data) {

// printf("cirrus: io write: %" LL "x, %d, %" LL "x \n", address+VGA_BASE,
// printf("cirrus: io write: %" PRIx64 ", %d, %" PRIx64 " \n", address+VGA_BASE,
// dsize, data);
switch (dsize) {
case 8:
Expand Down
2 changes: 1 addition & 1 deletion src/Configurator.cpp
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Expand Up @@ -196,7 +196,7 @@ CConfigurator::CConfigurator(class CConfigurator *parent, char *name,
int state_start = 0;
int line = 1;
int col = 1;
for (int i = 0; i < textlen; i++, q++, col++) {
for (unsigned int i = 0; i < textlen; i++, q++, col++) {
if (*q == 0x0a) {
line++;
col = 1;
Expand Down
2 changes: 1 addition & 1 deletion src/DMA.cpp
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Expand Up @@ -116,7 +116,7 @@ u64 CDMA::ReadMem(int index, u64 address, int dsize) {
u64 ret;
u8 data = 0;
int num;
// printf("dma: Readmem %s, %" LL "x, %x\n",DMA_INDEX(index),address, dsize);
// printf("dma: Readmem %s, %" PRIx64 ", %x\n",DMA_INDEX(index),address, dsize);
switch (dsize) {
case 32:
ret = ReadMem(index, address, 8);
Expand Down
4 changes: 2 additions & 2 deletions src/PCIDevice.cpp
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Expand Up @@ -248,7 +248,7 @@ void CPCIDevice::register_bar(int func, int bar, u32 data, u32 mask) {
(data & ~0x3),
length);
#if defined(DEBUG_PCI)
printf("%s(%s).%d PCI BAR %d set to IO % " LL "x, len %x.\n",
printf("%s(%s).%d PCI BAR %d set to IO % " PRIx64 ", len %x.\n",
myCfg->get_myName(), myCfg->get_myValue(), func, bar, t, length);
#endif
} else if ((data & 1) || bar != 6) {
Expand All @@ -262,7 +262,7 @@ void CPCIDevice::register_bar(int func, int bar, u32 data, u32 mask) {
(data & ~0xf),
length);
#if defined(DEBUG_PCI)
printf("%s(%s).%d PCI BAR %d set to MEM % " LL "x, len %x.\n",
printf("%s(%s).%d PCI BAR %d set to MEM % " PRIx64 ", len %x.\n",
myCfg->get_myName(), myCfg->get_myValue(), func, bar, t, length);
#endif
} else {
Expand Down
16 changes: 8 additions & 8 deletions src/S3Trio64.cpp
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Expand Up @@ -651,7 +651,7 @@ int CS3Trio64::RestoreState(FILE *f) {
u32 CS3Trio64::mem_read(u32 address, int dsize) {
u32 data = 0;

// printf("S3 mem read: %" LL "x, %d, %" LL "x \n", address, dsize, data);
// printf("S3 mem read: %" PRIx64 ", %d, %" PRIx64 " \n", address, dsize, data);
return data;
}

Expand All @@ -662,7 +662,7 @@ u32 CS3Trio64::mem_read(u32 address, int dsize) {
**/
void CS3Trio64::mem_write(u32 address, int dsize, u32 data) {

// printf("S3 mem write: %" LL "x, %d, %" LL "x \n", address, dsize, data);
// printf("S3 mem write: %" PRIx64 ", %d, %" PRIx64 " \n", address, dsize, data);
switch (dsize) {
case 8:
case 16:
Expand Down Expand Up @@ -690,7 +690,7 @@ u32 CS3Trio64::legacy_read(u32 address, int dsize) {
data |= (u64)vga_mem_read((u32)address + 0xA0000);
}

// //printf("S3 legacy read: %" LL "x, %d, %" LL "x \n", address, dsize,
// //printf("S3 legacy read: %" PRIx64 ", %d, %" PRIx64 " \n", address, dsize,
// data);
return data;
}
Expand All @@ -702,7 +702,7 @@ u32 CS3Trio64::legacy_read(u32 address, int dsize) {
**/
void CS3Trio64::legacy_write(u32 address, int dsize, u32 data) {

// //printf("S3 legacy write: %" LL "x, %d, %" LL "x \n", address, dsize,
// //printf("S3 legacy write: %" PRIx64 ", %d, %" PRIx64 " \n", address, dsize,
// data);
switch (dsize) {
case 32:
Expand Down Expand Up @@ -737,10 +737,10 @@ u32 CS3Trio64::rom_read(u32 address, int dsize) {
break;
}

// printf("S3 rom read: %" LL "x, %d, %" LL "x\n", address, dsize,data);
// printf("S3 rom read: %" PRIx64 ", %d, %" PRIx64 "\n", address, dsize,data);
} else {

// printf("S3 (BAD) rom read: %" LL "x, %d, %" LL "x\n", address,
// printf("S3 (BAD) rom read: %" PRIx64 ", %d, %" PRIx64 "\n", address,
// dsize,data);
}

Expand Down Expand Up @@ -815,7 +815,7 @@ u32 CS3Trio64::io_read(u32 address, int dsize) {
FAILURE_1(NotImplemented, "Unhandled port %x read", address);
}

// printf("S3 io read: %" LL "x, %d, %" LL "x \n", address, dsize, data);
// printf("S3 io read: %" PRIx64 ", %d, %" PRIx64 " \n", address, dsize, data);
return data;
}

Expand All @@ -826,7 +826,7 @@ u32 CS3Trio64::io_read(u32 address, int dsize) {
*/
void CS3Trio64::io_write(u32 address, int dsize, u32 data) {

// printf("S3 io write: %" LL "x, %d, %" LL "x \n", address+VGA_BASE,
// printf("S3 io write: %" PRIx64 ", %d, %" PRIx64 " \n", address+VGA_BASE,
// dsize, data);
switch (dsize) {
case 8:
Expand Down
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