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[TPU] kv cache update kernel supports dynamic grid #20235
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Signed-off-by: Chengji Yao <[email protected]>
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Summary of Changes
Hello @yaochengji, I'm Gemini Code Assist1! I'm currently reviewing this pull request and will post my feedback shortly. In the meantime, here's a summary to help you and other reviewers quickly get up to speed!
This pull request aims to improve the end-to-end throughput of the kv_cache_update
TPU kernel by leveraging dynamic grid features of Pallas. This change eliminates the need for padding input tensor slices, which previously led to inefficient trivial DMA copies, thereby optimizing performance.
Highlights
- Performance Optimization: The primary goal is to achieve over 1% e2e throughput gain by switching the
kv_cache_update
TPU kernel from using padded input tensor slices to a dynamic grid approach. This change reduces unnecessary DMA copies. - Dynamic Grid Implementation: The Pallas kernel for KV cache updates now dynamically determines its grid size based on the actual number of slices (
num_kv_update_slices
) rather than a padded size, utilizing a newcdiv
utility for ceiling division. - API Changes: The
kv_cache_update_op
and its underlying Pallas kernel (kv_cache_update
) now accept an additionalnum_kv_update_slices
parameter to facilitate the dynamic grid sizing. - Metadata Updates: The
PallasMetadata
struct has been extended to includenum_kv_update_slices
, ensuring this dynamic information is propagated through the system. - Test Suite Adaptation: The existing test for
kv_cache_update_kernel
has been updated to correctly pass the newnum_kv_update_slices
parameter, ensuring the changes are validated.
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@bythew3i , could you take a look? |
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Code Review
The pull request introduces dynamic grid support for the kv_cache_update
TPU kernel, aiming to eliminate unnecessary DMA copies and improve e2e throughput. The changes involve modifications to the test script and the kernel implementation, as well as updates to the worker to pass the number of KV update slices. The code appears well-structured and addresses the stated purpose. I've added a few comments to improve readability and highlight a potential platform-specific dependency.
XLA_LIB.define( | ||
"kv_cache_update_op(Tensor kv, Tensor slot_mapping, Tensor kv_cache, " | ||
"int page_size, int num_slices_per_block) -> Tensor", ) | ||
"kv_cache_update_op(Tensor kv, Tensor slot_mapping, Tensor kv_cache," \ | ||
"Tensor num_kv_update_slices, int page_size, int num_slices_per_block)" \ | ||
"-> Tensor", ) |
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vllm/v1/worker/tpu_model_runner.py
Outdated
# calcute the slot mapping | ||
slot_mapping_metadata = self._get_slot_mapping_metadata( | ||
num_reqs, num_scheduled_tokens_per_req) | ||
num_kv_update_slices = slot_mapping_metadata.shape[0] |
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Consider adding a brief comment to clarify what slot_mapping_metadata
represents. This will improve code readability.
# calcute the slot mapping | |
slot_mapping_metadata = self._get_slot_mapping_metadata( | |
num_reqs, num_scheduled_tokens_per_req) | |
num_kv_update_slices = slot_mapping_metadata.shape[0] | |
# calculate the slot mapping | |
slot_mapping_metadata = self._get_slot_mapping_metadata( | |
num_reqs, num_scheduled_tokens_per_req) |
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Thanks Chengji!
Assuming this pr is the same as https://github.com/vllm-project/tpu_commons/pull/87, then it LGTM
Signed-off-by: Chengji Yao <[email protected]>
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Nice, LGTM!
Signed-off-by: Chengji Yao <[email protected]>
Signed-off-by: Chengji Yao <[email protected]>
Signed-off-by: Chengji Yao <[email protected]> Signed-off-by: avigny <[email protected]>
Signed-off-by: Chengji Yao <[email protected]>
Purpose
In the
kv_cache_update
TPU kernel, we pad the input tensorslices
to prevent recompilation, but this resulted in numerous trivial DMA copies. We now use the dynamic grid features of a Pallas kernel to eliminate most of them. It can provide more than 1% e2e throughput gain usually.Test Plan
Test Result
Passed