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The shift operations of the Zbb instructions caused a permanent ALU stall (and thus, a timeout leading to an illegal instruction exception) when CPU_FAST_SHIFT_EN and RISCV_ISA_Zbkc are both disabled.

Bug discovered by @ecstrema in #640 (comment).

The iterative shift logic of the CLMUL instructions was permanently blocking other B shift instructions.
@stnolting stnolting added bug Something isn't working as expected HW Hardware-related labels Mar 14, 2025
@stnolting stnolting self-assigned this Mar 14, 2025
@stnolting stnolting marked this pull request as ready for review March 14, 2025 16:58
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Makes sense. It says in S_BUSY state while slmul.run is '1'.

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I wonder why it was set to '0' at first then...

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stnolting commented Mar 14, 2025

Thanks for reviewing!

I wonder why it was set to '0' at first then...

Just a typo I guess 🙈

@stnolting stnolting merged commit 4e38ba7 into main Mar 14, 2025
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@stnolting stnolting deleted the fix_zbb_slow_shifts branch March 14, 2025 21:15
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2 participants