CUTLASS fp8 blockwise gemm support of sm120 #9969
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jianyingzhu
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Summary of Changes
Hello @jianyingzhu, I'm Gemini Code Assist1! I'm currently reviewing this pull request and will post my feedback shortly. In the meantime, here's a summary to help you and other reviewers quickly get up to speed!
This pull request introduces support for the sm120 GPU architecture in the fp8 blockwise GEMM kernel, leveraging CUTLASS. The primary goal is to enhance computational efficiency and throughput for specific hardware configurations, leading to significant performance gains in operations like those found in large language models.
Highlights
- sm120 Architecture Support: Implemented support for the sm120 architecture within the CUTLASS fp8 blockwise GEMM kernel.
- Performance Improvement: Achieved a 55% throughput increase on Qwen-32B when compared to the Triton fp8 blockwise GEMM kernel.
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Code Review
This pull request adds support for the sm120 architecture to the FP8 blockwise GEMM kernel. The implementation largely follows the existing structure for other architectures. My review focuses on potential correctness and performance improvements. I've identified a likely incorrect scheduler configuration for the cooperative kernel, suggested adding problem-size-dependent tile shape dispatching to optimize performance, and pointed out significant code duplication that could be refactored to improve maintainability.
| using GemmKernel = cutlass::gemm::kernel::GemmUniversal< | ||
| Shape<int, int, int, int>, // Indicates ProblemShape | ||
| CollectiveMainloop, | ||
| CollectiveEpilogue, | ||
| void>; |
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The TileScheduler template argument for cutlass::gemm::kernel::GemmUniversal is specified as void, which defaults to cutlass::gemm::PersistentScheduler. However, the comment for CollectiveMainloop on line 290 states that KernelScheduleAuto defaults to a cooperative kernel schedule. PersistentScheduler is generally used for non-cooperative kernels. Using it with a cooperative mainloop might lead to incorrect behavior or suboptimal performance. For a cooperative kernel, you should use cutlass::gemm::CooperativeScheduler.
cutlass::gemm::CooperativeScheduler>;
| ScaleGranularityK, | ||
| cute::UMMA::Major::MN, | ||
| cute::UMMA::Major::K>; | ||
| // FP8 Block-wise scaling configuration | ||
| using LayoutSFA = decltype(ScaleConfig::deduce_layoutSFA()); // Layout type for SFA matrix operand | ||
| using LayoutSFB = decltype(ScaleConfig::deduce_layoutSFB()); // Layout type for SFB matrix operand | ||
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| using CollectiveEpilogue = typename cutlass::epilogue::collective::CollectiveBuilder< | ||
| ArchTag, | ||
| OperatorClass, | ||
| PerSmTileShape, | ||
| ClusterShape, | ||
| cutlass::epilogue::collective::EpilogueTileAuto, | ||
| ElementAccumulator, | ||
| ElementAccumulator, | ||
| ElementC, | ||
| LayoutCTag, | ||
| AlignmentC, | ||
| ElementD, | ||
| LayoutDTag, | ||
| AlignmentD, | ||
| cutlass::epilogue::collective::EpilogueScheduleAuto // Epilogue schedule policy | ||
| >::CollectiveOp; | ||
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| using CollectiveMainloop = typename cutlass::gemm::collective::CollectiveBuilder< | ||
| ArchTag, | ||
| OperatorClass, | ||
| ElementA, | ||
| cute::tuple<LayoutATag, LayoutSFA>, | ||
| AlignmentA, | ||
| ElementB, | ||
| cute::tuple<LayoutBTag, LayoutSFB>, | ||
| AlignmentB, | ||
| ElementAccumulator, | ||
| MmaTileShape, | ||
| ClusterShape, | ||
| cutlass::gemm::collective::StageCountAutoCarveout<static_cast<int>( | ||
| sizeof(typename CollectiveEpilogue::SharedStorage))>, | ||
| cutlass::gemm::collective::KernelScheduleAuto // Kernel schedule policy. Auto defaults to cooperative kernel | ||
| // schedule | ||
| >::CollectiveOp; | ||
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| using GemmKernel = cutlass::gemm::kernel::GemmUniversal< | ||
| Shape<int, int, int, int>, // Indicates ProblemShape | ||
| CollectiveMainloop, | ||
| CollectiveEpilogue, | ||
| void>; | ||
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| using Gemm = cutlass::gemm::device::GemmUniversalAdapter<GemmKernel>; | ||
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| Gemm gemm_op; | ||
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| int m = a.size(0); | ||
| int k = a.size(1); | ||
| int n = b.size(1); | ||
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| auto a_ptr = static_cast<ElementA*>(a.data_ptr()); | ||
| auto b_ptr = static_cast<ElementB*>(b.data_ptr()); | ||
| auto c_ptr = static_cast<ElementD*>(out.data_ptr()); | ||
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| auto scales_a_ptr = static_cast<ElementBlockScale*>(scales_a.data_ptr()); | ||
| auto scales_b_ptr = static_cast<ElementBlockScale*>(scales_b.data_ptr()); | ||
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| using StrideA = typename Gemm::GemmKernel::StrideA; | ||
| using StrideB = typename Gemm::GemmKernel::StrideB; | ||
| using StrideD = typename Gemm::GemmKernel::StrideD; | ||
| using StrideC = typename Gemm::GemmKernel::StrideD; | ||
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| StrideA stride_a = cutlass::make_cute_packed_stride(StrideA{}, cute::make_shape(m, k, 1)); | ||
| StrideB stride_b = cutlass::make_cute_packed_stride(StrideB{}, cute::make_shape(n, k, 1)); | ||
| StrideC stride_c = cutlass::make_cute_packed_stride(StrideC{}, cute::make_shape(m, n, 1)); | ||
| LayoutSFA layout_SFA = ScaleConfig::tile_atom_to_shape_SFA(make_shape(m, n, k, 1)); | ||
| LayoutSFB layout_SFB = ScaleConfig::tile_atom_to_shape_SFB(make_shape(m, n, k, 1)); | ||
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| typename GemmKernel::MainloopArguments mainloop_args{ | ||
| a_ptr, stride_a, b_ptr, stride_b, scales_a_ptr, layout_SFA, scales_b_ptr, layout_SFB}; | ||
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| typename GemmKernel::EpilogueArguments epilogue_args{{}, c_ptr, stride_c, c_ptr, stride_c}; | ||
| epilogue_args.thread.alpha = 1.0f; | ||
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| typename Gemm::Arguments args = { | ||
| cutlass::gemm::GemmUniversalMode::kGemm, | ||
| {m, n, k, 1}, | ||
| mainloop_args, | ||
| epilogue_args, | ||
| }; | ||
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| auto can_implement = gemm_op.can_implement(args); | ||
| TORCH_CHECK(can_implement == cutlass::Status::kSuccess, cutlassGetStatusString(can_implement)) | ||
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| size_t workspace_size = gemm_op.get_workspace_size(args); | ||
| cutlass::device_memory::allocation<uint8_t> workspace(workspace_size); | ||
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| auto init_status = gemm_op.initialize(args, workspace.get()); | ||
| TORCH_CHECK(init_status == cutlass::Status::kSuccess, cutlassGetStatusString(init_status)); | ||
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| auto stream = at::cuda::getCurrentCUDAStream(a.get_device()); | ||
| auto status = gemm_op.run(stream); | ||
| TORCH_CHECK(status == cutlass::Status::kSuccess, cutlassGetStatusString(status)) | ||
| } |
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The new function launch_sm120_fp8_blockwise_scaled_mm is very similar to the existing launch_sm100_fp8_blockwise_scaled_mm. There is a large amount of duplicated code for type definitions, argument setup, and kernel launching logic. This makes the code harder to maintain. Consider refactoring the common code into a template function that can be specialized for different architectures (Sm100, Sm120, etc.) by passing the architecture-specific types and configurations as template parameters.
| template <typename OutType> | ||
| void sm120_fp8_blockwise_dispatch_shape( | ||
| torch::Tensor& out, | ||
| const torch::Tensor& a, | ||
| const torch::Tensor& b, | ||
| const torch::Tensor& scales_a, | ||
| const torch::Tensor& scales_b) { | ||
| using MmaTileShape = Shape<_128, _128, _128>; | ||
| using PerSmTileShape = Shape<_128, _128, _128>; | ||
| using EpilogueTileShape = Shape<_128, _64>; | ||
| using ScalesPerTile = Shape<_128, _1, _1>; | ||
| launch_sm120_fp8_blockwise_scaled_mm<OutType, MmaTileShape, PerSmTileShape, EpilogueTileShape, ScalesPerTile>( | ||
| out, a, b, scales_a, scales_b); | ||
| } |
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The sm120_fp8_blockwise_dispatch_shape function uses a fixed set of tile shapes. The corresponding function for sm100, sm100_fp8_blockwise_dispatch_shape, has logic to select different tile shapes based on the M dimension of the input tensor a (specifically, if (a.size(0) <= 128)). This is a common optimization to improve performance for different problem sizes. You should consider adding similar dispatch logic here for sm120 to select more optimal tile shapes for smaller M dimensions.
template <typename OutType>
void sm120_fp8_blockwise_dispatch_shape(
torch::Tensor& out,
const torch::Tensor& a,
const torch::Tensor& b,
const torch::Tensor& scales_a,
const torch::Tensor& scales_b) {
if (a.size(0) <= 128) {
using MmaTileShape = Shape<_64, _128, _128>;
using PerSmTileShape = Shape<_64, _128, _128>;
using EpilogueTileShape = Shape<_64, _64>;
using ScalesPerTile = Shape<_64, _1, _1>;
launch_sm120_fp8_blockwise_scaled_mm<OutType, MmaTileShape, PerSmTileShape, EpilogueTileShape, ScalesPerTile>(
out, a, b, scales_a, scales_b);
} else {
using MmaTileShape = Shape<_128, _128, _128>;
using PerSmTileShape = Shape<_128, _128, _128>;
using EpilogueTileShape = Shape<_128, _64>;
using ScalesPerTile = Shape<_128, _1, _1>;
launch_sm120_fp8_blockwise_scaled_mm<OutType, MmaTileShape, PerSmTileShape, EpilogueTileShape, ScalesPerTile>(
out, a, b, scales_a, scales_b);
}
}
I only modified one file (fp8_blockwise_gemm_kernel.cu), but many kernels that I didn’t change are failing in the unit tests, such as |
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@jianyingzhu I suppose that this PR does not support GLM-4.5-Air-FP8 ? The latest compiled sgl-kernel and sglang still fails with: File "/sgl-workspace/sglang.git/python/sglang/srt/layers/quantization/compressed_tensors/schemes/compressed_tensors_w8a8_fp8.py", line 164, in apply_weights (python -m sglang.launch_server --model /mnt/GLM-4.5-Air-FP8/ --tp 2 --attention-backend flashinfer --host 0.0.0.0 --port 5001 --mem-fraction-static 0.95 --context-length 128000) |
Yes, this PR only supports fp8_blockwise_scaled_mm on sm120, and does not currently support fp8_scaled_mm on sm120. The GLM-4.5-Air-FP8 model calls fp8_scaled_mm. The fp8_scaled_mm may correspond to this PR: #9403. Thank you! |
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01 --mem-fraction-static 0.95 --context-length 128000)
Thank you - what is exact configuratin options to run fp8 blockwise gemm (qwen3) models with this PR? (I'm trying it - looks good but I want to be sure I used all relevant parameters |
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also - there is this PR in flashinfer - flashinfer-ai/flashinfer#1610 (cutlass fp8 gemm bringup for SM120 & SM121) - is this related to this PR in any way or its the flashinfer FP8 sm120 support with different kernels? |
My model weights are Qwen3-32B-FP8, with the quantization config set to blockwise. Therefore, I am using the docker image lmsysorg/sglang:b200-cu129.
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SGL_ENABLE_JIT_DEEPGEMM=False python -m sglang.launch_server --model /mnt/Qwen3-30B-A3B-Instruct-2507-FP8/ --tp 2 --attention-backend flashinfer --host 0.0.0.0 --port 5000 --mem-fraction-static 0.95 --context-length 128000 --enable-metrics 185tokens/sec vs SGLANG_SUPPORT_CUTLASS_BLOCK_FP8=1 SGL_ENABLE_JIT_DEEPGEMM=False python -m sglang.launch_server --model /mnt/Qwen3-30B-A3B-Instruct-2507-FP8/ --tp 2 --attention-backend flashinfer --host 0.0.0.0 --port 5000 --mem-fraction-static 0.95 --context-length 128000 --enable-metrics 155tokens/sec for a single inference - is it expected that the SGLANG_SUPPORT_CUTLASS_BLOCK_FP8 is that slower? I have compiled this PR inside the lmsysorg/sglang:b200-cu129 docker (with the latest flashinfer 0.3.1 ) |
I tried the same command on my machine and test the performance, on my machine the throughput of SGLANG_SUPPORT_CUTLASS_BLOCK_FP8 is doubled, with 2010.77 tok/s vs 4120.86 tok/s (SGLANG_SUPPORT_CUTLASS_BLOCK_FP8=1), seen as follows:
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@jianyingzhu I'm getting 4374 input token throughput without the SGLANG_SUPPORT_CUTLASS_BLOCK_FP8 - I cannot reproduce your low numbers Can you please try my docker image which I have just pushed: docker.io/voipmonitor/b200-cu129-pr9969 Run the command:
Inside the docker I have optimised truton json files for my NVIDIA_RTX_PRO_6000_Blackwell_Server_Edition - this should be same as your 50XX as the chip is same as rtx 6000 pro - there will be only different name - just copy two files N=2560,K=2048,device_name=NVIDIA_RTX_PRO_6000_Blackwell_Server_Edition,dtype=fp8_w8a8,block_shape=[128, 128].json and /sgl-workspace/sglang.git/python/sglang/srt/layers/moe/fused_moe_triton/configs/triton_3_4_0/E=128,N=384,device_name=NVIDIA_RTX_PRO_6000_Blackwell_Server_Edition,dtype=fp8_w8a8,block_shape=[128, 128].json to your json file (you will see what file you need once you run the command) This is my output: this is for SGLANG_SUPPORT_CUTLASS_BLOCK_FP8=1 SGL_ENABLE_JIT_DEEPGEMM=False python -m sglang.launch_server --model /mnt/Qwen3-30B-A3B-Instruct-2507-FP8/ --tp 2 --attention-backend flashinfer --host 0.0.0.0 --port 5000 --mem-fraction-static 0.95 --context-length 128000 --enable-metrics |
Motivation
This pull request adds support for the SM120 architecture in the Cutlass FP8 blockwise GEMM kernel, enabling improved performance on the latest hardware.
Modifications
Introduced an SM120-specific branch in
fp8_blockwise_gemm_kernel.cuto leverage new features and optimizations of Cutlass.Accuracy Tests
Benchmarking and Profiling
Benchmarking on the Qwen3-32B model shows a 55% throughput increase compared to the Triton FP8 blockwise GEMM kernel, from 1585 tok/s to 2473 tok/s.
MLP up of cutlass kernel of: 30ms
MLP up of Triton kernel: 60ms
Checklist