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@Victor-Jung Victor-Jung commented Apr 23, 2025

This super hot PR unifies the LLVM versions between the platforms Deeploy supports. Previously, we were using a pre-compiled LLVM 12 for Snitch. Additionally, it consolidates several aspects of the CD infrastructure.

Added

  • Build flow and its Docker integration for LLVM 15 tagged `15.0.0-snitch-0.1.0'
  • Picolibc build flow for v32im, v32ima, rv32imc and rv32imafd. Previously, it was only for rv32imc.
  • LLVM Compiler RT for rv32im, rv32ima, and rv32imafd.
  • Appropriate linking of picolibc and compiler RT.
  • Build and install a flow for XTensor, XTL, and XSIMD. These libraries are used in some GVSoC models, and they used to live in the PULP SDK, as a header-only library. Keeping only the library headers in the PULP SDK makes it hard to bump new versions.

Changed

  • Officially depreciate Banshee as a simulator for Snitch Cluster in the CI. Maintaining this is a burden and unnecessary, as GVSoC is now the standard simulator. Additionally, newer versions of the Snitch runtime don't support Banshee anymore.
  • Bump XTensor's version to 0.25.0 to fix a bug with Intel's SSE.
  • Update snitch cluster patch to link to picolibc and add explicit target.
  • Update README to include Snitch in the Getting Started and the D&T Journal.

Removed

  • Remove the link to the precompiled LLVM 12 in the testRunner for Snitch and in the CI.
  • Remove the sourcing of the cursed PULP SDK script.

PR Merge Checklist

  1. The PR is rebased on the latest devel commit and pointing to devel.
  2. Your PR reviewed and approved.
  3. All checks are passing.
  4. The CHANGELOG.md file has been updated.
  5. If the docker was modified, change back its link after review.

@Victor-Jung Victor-Jung self-assigned this Apr 23, 2025
@Victor-Jung Victor-Jung requested a review from Xeratec as a code owner April 23, 2025 20:28
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Looks good except that some tests are not passing, and I think MemPool does not support RV32IMC but only RV32IM

@FrancescoConti
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Three toolchains for drone researchers under the sky,
Seven for the RTL developers in their halls of cement,
Nine for software guys doomed to suffer,
One for the Dark Deeployers in their torment,
In the Land of Zurich where overflows the buffer.
One LLVM to compile them all, One LLVM to find them,
One LLVM to bring them all and in the binary link them
In the Land of Zurich where overflows the buffer.

@Xeratec
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Xeratec commented Apr 25, 2025

Three toolchains for drone researchers under the sky,
Seven for the RTL developers in their halls of cement,
Nine for software guys doomed to suffer,
One for the Dark Deeployers in their torment,
In the Land of Zurich where overflows the buffer.
One LLVM to compile them all, One LLVM to find them,
One LLVM to bring them all and in the binary link them
In the Land of Zurich where overflows the buffer.

Love it! I made the same reference when he told me about this PR 😂

573695d6-5ac6-411a-8aca-07ca88130a48

@Victor-Jung
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All my future Deeploy-related talks will be "One Framework to Deeploy them All" ;)

@Victor-Jung
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@Xeratec Ready for review

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LGTM, just have one question. Feel free to merge.

@Victor-Jung Victor-Jung merged commit fdde994 into pulp-platform:devel May 5, 2025
2 of 121 checks passed
FrancescoConti pushed a commit to FrancescoConti/Deeploy that referenced this pull request May 9, 2025
* Update Snitch LLVM installation flow

* Update Snitch Runtime version

* Update LLVM 15 version and use it for snitch runtime compilation
Add Compiler RT for RV32IMAFD
Compile picolib for RV32IMAFD

* Include picolib for Snitch and link rv32imafd Compiler RT

* Remove LLVM patching

* Add clang-format to apt req

* Include and link picolib when compiling snitch rt

* Compile picolibc for rv32imc and rv32imafd
Link picolib properly and indicate targets manually for generic platform (temporary fix)
Comment bits/float.h in snitch runtime

* Fix snitch cluster patch

* Fix bits/float.h import error

* Remove banshee Snitch test (depreciated) and fix toolchain link for snitch

* Bump GVSoC Version

* Temporarily disable concurrent L3 transfer due to driver bug

* Downgrade GVSoC version and emmit new docker

* Fix typo

* Properly forbid starting concurrent L3 transfers

* Add XTensor build flow + bump XTensor and GVSoC version

* Bump GVSoC Version

* Fix Makefile xtensor build

* Bump GVSoC Version

* Enable the full CI

* Update README + ChangeLog

* Make GVSoC the standard simulator for Snitch and remove unecessary script source

* Add build flow for picolibc and compiler-rt for rv32ima and rv32im, change mempool picolibc and compiler-rt for rv32ima

* Make the generic platform generic again!

* Prepare Docker link for merge
runwangdl pushed a commit to Victor-Jung/Deeploy that referenced this pull request May 11, 2025
* Update Snitch LLVM installation flow

* Update Snitch Runtime version

* Update LLVM 15 version and use it for snitch runtime compilation
Add Compiler RT for RV32IMAFD
Compile picolib for RV32IMAFD

* Include picolib for Snitch and link rv32imafd Compiler RT

* Remove LLVM patching

* Add clang-format to apt req

* Include and link picolib when compiling snitch rt

* Compile picolibc for rv32imc and rv32imafd
Link picolib properly and indicate targets manually for generic platform (temporary fix)
Comment bits/float.h in snitch runtime

* Fix snitch cluster patch

* Fix bits/float.h import error

* Remove banshee Snitch test (depreciated) and fix toolchain link for snitch

* Bump GVSoC Version

* Temporarily disable concurrent L3 transfer due to driver bug

* Downgrade GVSoC version and emmit new docker

* Fix typo

* Properly forbid starting concurrent L3 transfers

* Add XTensor build flow + bump XTensor and GVSoC version

* Bump GVSoC Version

* Fix Makefile xtensor build

* Bump GVSoC Version

* Enable the full CI

* Update README + ChangeLog

* Make GVSoC the standard simulator for Snitch and remove unecessary script source

* Add build flow for picolibc and compiler-rt for rv32ima and rv32im, change mempool picolibc and compiler-rt for rv32ima

* Make the generic platform generic again!

* Prepare Docker link for merge
@Xeratec Xeratec mentioned this pull request Jul 8, 2025
Xeratec added a commit that referenced this pull request Jul 8, 2025
This release contains major architectural changes, new platform support,
enhanced simulation workflows, floating-point kernel support, training
infrastructure for CCT models, memory allocation strategies, and
documentation improvements.

After merging this into `main`, the release process will proceed with:
- Pushing a Git tag for the release after merging this PR
- Creating a GitHub release with the prepared tag.

Note: Since the release tag references the Docker container tagged with
the release tag (`ghcr.io/pulp-platform/deeploy:v0.2.0`), the CI will
initially fail. The Deeploy Docker image must be built after the release
PR is merged and the CI restarted.

### List of Pull Requests
- Prepare v0.2.0 release
[#102](#102)
- Add Luka as Code Owner
[#101](#101)
- Fix CI, Docker Files, and Documentation Workflow
[#100](#100)
- Chimera Platform Integration
[#96](#96)
- Add Tutorial and Refactor README
[#97](#97)
- Reduce Mean Float Template
[#92](#92)
- Reshape Memory Freeing and Generic Float GEMM Fixes
[#91](#91)
- Prepare for Release and Separate Dependencies
[#90](#90)
- Fix input offsets calculation
[#89](#89)
- Move PULP SDK to main branch/fork
[#88](#88)
- Finite Lifetime for IO Tensors
[#51](#51)
- Improved Memory Visualization and Multi-Layer Tiling Profiling
[#56](#56)
- Fix Linting in CI and Reformat C Files
[#86](#86)
- Fix Broken CMake Flow For pulp-sdk
[#87](#87)
- Refactor Changelog For Release
[#85](#85)
- ARM Docker Container and Minor Bug Fix
[#84](#84)
- Added Kernel for Generic Float DW Conv2D
[#63](#63)
- Autoselect Self-Hosted Runners if the Action is on Upstream
[#81](#81)
- TEST_RECENT linking on MacOS
[#78](#78)
- Add RV32IMF Picolibc support for Siracusa platform
[#66](#66)
- Improve Documentation and VSCode Support
[#76](#76)
- Debug Print Topology Pass and Code Transformation
[#75](#75)
- Find all subdirectories of Deeploy when installing with pip install
[#70](#70)
- Add milestone issue template
[#71](#71)
- Bunch of fixes and changes
[#58](#58)
- Add SoftHier platform
[#65](#65)
- rv32imf_xpulpv2 ISA support for Siracusa platform
[#64](#64)
- One LLVM To Compile Them All
[#60](#60)
- One GVSoC to Simulate Them All
[#59](#59)
- Add Support for CCT Last Layer Training with Embedding Dim 8-128
[#55](#55)
- Add CCT Classifier Training Support
[#53](#53)
- L3 Bugs: DMA Struct Datatype and Maxpool Margin Error
[#45](#45)
- DeepQuant Quantized Linear Support
[#54](#54)
- Implemented Dequant Layer for Generic and Siracusa
[#52](#52)
- Infinite Lifetime Buffers Considered in Tiling & Memory Allocation (+
Visualization) [#44](#44)
- Implemented Quant Layer for Generic and Siracusa
[#49](#49)
- Increase maximal Mchan DMA transfer sizes from 64KiB to 128KiB
[#47](#47)
- Add MiniMalloc and Decouple Memory Allocation and Tiling
[#40](#40)
- Float CCT Bugs on L3
[#37](#37)
- Memory Allocation Strategies and Visualization
[#36](#36)
- Add CODEOWNERS [#42](#42)
- Add Tiling Support to All CCT Kernels and Fix CCT Operators on
Siracusa Platform for L2
[#35](#35)
- Add Fp gemm and Softmax for Snitch platform
[#31](#31)
- Add Float Kernels for CCT
[#29](#29)
- documentation deployment
[#34](#34)
- main.c Float Cast Bugs
[#28](#28)
- Add Float GEMM on PULP with Tiling
[#26](#26)
- Add Float Support & Float GEMM for Generic
[#25](#25)
- GVSOC support for the Snitch Cluster platform
[#23](#23)
- Snitch Cluster Tiling Support
[#22](#22)
- Snitch support integration
[#14](#14)
- Update bibtex citation
[#20](#20)
- the PR template location, bump min python to 3.10, change install
command [#17](#17)
- Add pre-commit for python formatting
[#15](#15)
- FP integration (v2)
[#12](#12)
- shell for sequential tests of Generic, Cortex, and Mempool platforms
[#11](#11)
- Add issue templates
[#10](#10)
- Minor CI and Readme Improvements
[#8](#8)
- Fix GHCR Link for Docker Build
[#7](#7)
- neureka's ccache id
[#6](#6)
- GitHub-based CI/CD Flow
[#4](#4)
- Generic Softmax Kernel
[#2](#2)
- Port GitLab CI [#1](#1)
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3 participants