[Puzzle 16] Update call to copy_dram_to_sram_async to address redundant memory operations #64
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copy_dram_to_sram_async
did not support 2d thread blocks before modular/modular#5068. As a result the async copy in the Idiomatic LayoutTensor tiling solution currently uses all9
threads from the 2d thread block to perform the copy even though the load layout explicitley specifies3
. PR adds extra parameters to fix this.