A SUMP compatible 16Bit Logic Analyzer for ESP32 MCUs.
- Uses ESP32 I2S DMA and can capture speeds up to 20 MHz.
- Supports 8-bit and 16-bit operations.
- Maximum 128k samples (even in 8-bit capturing mode).
- RLE compression supported.
- Default OLS port is UART0 with a default baud rate of 912600.
- You can configure UART ports and high-speed baud rates for OLS communication by editing the definitions in LogicAnalyzerConfig.h.
| Environment | Status | Details |
|---|---|---|
| PlatformIO | ✅ | Tested with [email protected] |
| Arduino IDE | ✅ | Tested with Arduino-ESP32 core 3.2.0 |
- WROOVER modules support 2M samples but only up to 2 MHz due to bandwidth limits on PSRAM access.
- Analog input support.
- Install PlatformIO in VS Code.
- Open the project folder in PlatformIO.
- Build the project and flash it to your ESP32.
- Install the ESP32 board support via the Boards Manager (
esp32 by Espressif Systems). - Open the sketch in
ESP32_LogicAnalyzer/ESP32_LogicAnalyzer.ino. - Select the board you're using (e.g.
ESP32 Dev Module). - Make sure you're using the ESP32 Arduino core version 3.2.0.
- Click Upload.
Important: If you're using UART0 for OLS communication, set Core Debug Level = None in the Arduino IDE before compiling, especially for captures above 10 MHz.
Open PulseView with:
pulseview -D -d ols:conn=/dev/ttyUSB0::serialcomm=921600/8n1Or from the GUI, connect the device and select Openbench Logic Sniffer & SUMP compatibles (ols).
RLE can be enabled in Device configuration dialog:
For more details, see the PulseView documentation.
| Pin | Connection |
|---|---|
| clk_in | GPIO23 (connect to clk_out) |
| clk_out | GPIO22 (connect to clk_in) |
| Ground | Connect the target device's GND to the ESP32 GND |
| Channels | CH15 - CH0 (connect your signals here) |
Do not use these pins for general I/O. If needed, change them in the code and rewire accordingly.
This project includes a custom PCB designed in KiCad 9 to connect the ESP32 DevKitC V1 with logic analyzer channels and level shifters.
All hardware-related files are located in the hardware/ folder and include:
- Complete KiCad project (
.kicad_pro,.kicad_sch,.kicad_pcb) - BOM (
BOM.xlsx) and CPL (CPL1.xlsx) for assembly - Gerber files (
hardware/gerbers/) for PCB fabrication - Optional UART2 debug port
- Level shifter ICs (SN74LVC245A) for 5V input compatibility
⚠️ The design is currently under validation. Use at your own risk until physical tests are completed.
This project is a fork of ESP32_LogicAnalyzer, created by Erdem U. Altinyurt.
This project uses code from:
- esp32-cam-demo for I2S DMA.
- Arduino Logic Analyzer as a SUMP protocol "template".
This project is licensed under the GPL 3.0 License. See the LICENSE file for details.