Too generic pattern rule in tools/lkl/Makefile on POSIX hosts

[rodionov]

When writing build rules for targets in tools/lkl/Makefile we cannot depend on source files in tools/lkl/ folder due to the pattern rules below

# rule to link programs
$(OUTPUT)%$(EXESUF): $(OUTPUT)%-in.o $(OUTPUT)liblkl.a
	$(QUIET_LINK)$(CC) $(LDFLAGS) $(LDFLAGS_$*-y) -o $@ $^ $(LDLIBS) $(LDLIBS_$*-y)

# rule to build objects
$(OUTPUT)%-in.o: $(OUTPUT)lib/lkl.o FORCE
	$(Q)$(MAKE) -f $(srctree)/tools/build/Makefile.build dir=$(patsubst %/,%,$(dir $*)) obj=$(notdir $*)

For POSIX targets $(EXESUF) is an empty string, thus, target $(OUTPUT)%$(EXESUF) would match any source file. Additionally, as this target transitively depends on FORCE (through $(OUTPUT)%-in.o) make will always try to remake it.

Thus, something like below won't work on POSIX host where $(OUTPUT) is the same as $(srctree)/tools/lkl which is the default configuration.

$(OUTPUT)my_target: $(srctree)/tools/lkl/my_target.c

as make would try to remake $(OUTPUT)my_target.c-in.o instead of using the existing .c file as the prerequisite.