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[CI] Remove extra PRs for CI tests #1929

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Aug 14, 2025
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Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@ botnet26t_256,pass,pass,pass,pass,pass
cait_m36_384,pass,pass,pass,pass,pass
coat_lite_mini,pass,pass,pass,pass,pass
convit_base,pass,pass,pass,pass,pass
convmixer_768_32,pass,pass,pass,pass,pass
convmixer_768_32,pass,fail_accuracy,pass,fail_accuracy,pass
# https://github.com/intel/torch-xpu-ops/issues/1274
convnext_base,pass,fail_accuracy,fail_accuracy,pass,pass
crossvit_9_240,pass,pass,pass,pass,pass
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Original file line number Diff line number Diff line change
Expand Up @@ -2,10 +2,10 @@ name,float32,bfloat16,float16,amp_bf16,amp_fp16
adv_inception_v3,pass,pass,pass,pass,pass
beit_base_patch16_224,pass,pass,pass,pass,pass
botnet26t_256,pass,pass,pass,pass,pass
cait_m36_384,pass,pass,pass,pass,pass
cait_m36_384,pass,pass,fail_accuracy,pass,pass
coat_lite_mini,pass,pass,pass,pass,pass
convit_base,pass,pass,pass,pass,pass
convmixer_768_32,pass,pass,pass,pass,pass
convmixer_768_32,pass,fail_accuracy,pass,fail_accuracy,pass
# https://github.com/intel/torch-xpu-ops/issues/1274
convnext_base,pass,fail_accuracy,fail_accuracy,pass,pass
crossvit_9_240,pass,pass,pass,pass,pass
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Original file line number Diff line number Diff line change
Expand Up @@ -19,11 +19,11 @@ densenet121,pass,pass,pass,pass,pass
# https://github.com/intel/torch-xpu-ops/issues/1278
detectron2_fasterrcnn_r_101_c4,pass,eager_fail_to_run,fail_accuracy,fail_accuracy,fail_accuracy
detectron2_fasterrcnn_r_101_dc5,pass,eager_fail_to_run,fail_accuracy,fail_accuracy,fail_accuracy
detectron2_fasterrcnn_r_101_fpn,pass,eager_fail_to_run,fail_accuracy,fail_accuracy,fail_accuracy
detectron2_fasterrcnn_r_101_fpn,eager_1st_run_OOM,eager_fail_to_run,fail_accuracy,fail_accuracy,fail_accuracy
detectron2_fasterrcnn_r_50_c4,pass,eager_fail_to_run,fail_accuracy,fail_accuracy,fail_accuracy
detectron2_fasterrcnn_r_50_dc5,pass,eager_fail_to_run,fail_accuracy,fail_accuracy,fail_accuracy
detectron2_fasterrcnn_r_50_fpn,pass,eager_fail_to_run,fail_accuracy,fail_accuracy,pass
detectron2_fcos_r_50_fpn,pass,pass,pass,pass,pass
detectron2_fasterrcnn_r_50_fpn,eager_1st_run_OOM,eager_fail_to_run,eager_1st_run_OOM,fail_accuracy,pass
detectron2_fcos_r_50_fpn,pass,pass,pass,fail_accuracy,pass
detectron2_maskrcnn,fail_to_run,eager_fail_to_run,fail_to_run,eager_fail_to_run,fail_to_run
detectron2_maskrcnn_r_101_c4,fail_accuracy,eager_fail_to_run,fail_accuracy,fail_accuracy,fail_accuracy
detectron2_maskrcnn_r_101_fpn,fail_accuracy,eager_fail_to_run,eager_1st_run_OOM,eager_1st_run_OOM,fail_accuracy
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7 changes: 1 addition & 6 deletions .github/scripts/apply_torch_pr.py
Original file line number Diff line number Diff line change
Expand Up @@ -9,12 +9,7 @@
parser = argparse.ArgumentParser()
parser.add_argument('--pr-list', '-n', nargs='+',
default=[
# Fallback to CPU for XPU FP64
"https://github.com/pytorch/pytorch/pull/156456",
# Modify the tolerance level in TIMM benchmark
"https://github.com/pytorch/pytorch/pull/143739",
# "Enhance testing infrastructure to add half-precision support for histc on XPU"
"https://github.com/pytorch/pytorch/pull/154339",
# Additional PRs link if need for CICD tests
]
)
parser.add_argument('--extra-pr-list', '-e', nargs='+',default=[])
Expand Down