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Mark bit ranges of swizzles with comments in generated SystemVerilog #1209

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Mark bit ranges of swizzles with comments in generated SystemVerilog

Mark bit ranges of swizzles with comments in generated SystemVerilog #1209

Triggered via pull request November 5, 2025 17:40
@mkorbel1mkorbel1
synchronize #627
mkorbel1:mark_swiz_bit_ranges
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