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#78303 Add transformation ~v1 & v2 to VectorXxx.AndNot(v1, v2) #81993
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
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@@ -10869,7 +10869,71 @@ GenTree* Compiler::fgOptimizeHWIntrinsic(GenTreeHWIntrinsic* node) | |
| INDEBUG(node->gtDebugFlags |= GTF_DEBUG_NODE_MORPHED); | ||
| return node; | ||
| } | ||
| #if defined(TARGET_XARCH) | ||
| case NI_SSE_And: | ||
| case NI_SSE2_And: | ||
| case NI_AVX_And: | ||
| case NI_AVX2_And: | ||
| { | ||
| if (node->GetOperandCount() != 2) | ||
|
||
| { | ||
| return node; | ||
| } | ||
|
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| GenTree* op1 = node->Op(1); | ||
| GenTree* op2 = node->Op(2); | ||
| GenTree* lhs = nullptr; | ||
| GenTree* rhs = nullptr; | ||
| GenTreeHWIntrinsic* inner_hw = nullptr; | ||
|
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||
| // Transforms ~v1 & v2 to VectorXxx.AndNot(v2, v1) | ||
| if (op1->OperIs(GT_HWINTRINSIC)) | ||
| { | ||
| rhs = op2; | ||
| inner_hw = op1->AsHWIntrinsic(); | ||
| } | ||
| // Transforms v2 & (~v1) to VectorXxx.AndNot(v1, v2) | ||
| else if (op2->OperIs(GT_HWINTRINSIC)) | ||
| { | ||
| rhs = op1; | ||
| inner_hw = op2->AsHWIntrinsic(); | ||
| } | ||
| else | ||
| { | ||
| return node; | ||
| } | ||
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| if ((inner_hw->GetOperandCount() != 2) || (!inner_hw->Op(2)->IsVectorAllBitsSet())) | ||
| { | ||
| return node; | ||
| } | ||
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| switch (inner_hw->GetHWIntrinsicId()) | ||
| { | ||
| case NI_SSE_Xor: | ||
| case NI_SSE2_Xor: | ||
| case NI_AVX_Xor: | ||
| case NI_AVX2_Xor: | ||
| break; | ||
| default: | ||
| return node; | ||
| } | ||
|
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||
| var_types hw_type = node->TypeGet(); | ||
| CorInfoType hw_coretype = node->GetSimdBaseJitType(); | ||
| unsigned int hw_simdsize = node->GetSimdSize(); | ||
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| lhs = inner_hw->Op(1); | ||
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| GenTree* andnNode = gtNewSimdBinOpNode(GT_AND_NOT, hw_type, lhs, rhs, hw_coretype, hw_simdsize, true); | ||
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| DEBUG_DESTROY_NODE(node); | ||
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| INDEBUG(andnNode->gtDebugFlags |= GTF_DEBUG_NODE_MORPHED); | ||
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| return andnNode; | ||
| } | ||
| #endif | ||
| default: | ||
| { | ||
| break; | ||
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What about Vector128/256_And and AdvSimd ?
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Vector64/128/256_Anddon't exist outside ofimportat the moment so they don't need to be handled.AdvSimdshould be since we want parity between xarch and arm.