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TraceSinkMonitor should be a SystemVerilog module #3744

@T-K-233

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@T-K-233

The TraceSinkMonitor is a blackbox module wrapping around /vsrc/TraceSinkMonitor.v. However, inside the file, it is using the final block construct, a SystemVerilog feature.

The file extension should be changed to .sv to inform the simulation/synthesis tool that this is a SystemVerilog module, not a Verilog one.

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