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Extend return register lifetime #3264

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Merged
merged 2 commits into from
Jun 29, 2017
Merged

Extend return register lifetime #3264

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bb4e9fa
Keep the `Ret` instruction to extend the lifetime of the return regis…
Cellule Jun 29, 2017
bf376ec
Also change LowerRet on Arm
Cellule Jun 29, 2017
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1 change: 1 addition & 0 deletions lib/Backend/Lower.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -23589,6 +23589,7 @@ Lowerer::ValidOpcodeAfterLower(IR::Instr* instr, Func * func)
}
switch (opcode)
{
case Js::OpCode::Ret:
case Js::OpCode::Label:
case Js::OpCode::StatementBoundary:
case Js::OpCode::DeletedNonHelperBranch:
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16 changes: 10 additions & 6 deletions lib/Backend/LowerMDShared.cpp
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Expand Up @@ -863,8 +863,10 @@ LowererMD::LowerRet(IR::Instr * retInstr)
retInstr->SetSrc1(lowOpnd);

// Mov high bits to edx
IR::RegOpnd* regEdx = IR::RegOpnd::New(nullptr, RegEDX, regType, this->m_func);
IR::RegOpnd* regEdx = IR::RegOpnd::New(regType, this->m_func);
regEdx->SetReg(RegEDX);
Lowerer::InsertMove(regEdx, highOpnd, retInstr);
retInstr->SetSrc2(regEdx);
}
#endif
break;
Expand Down Expand Up @@ -910,17 +912,19 @@ LowererMD::LowerRet(IR::Instr * retInstr)
Assert(UNREACHED);
}

retReg = IR::RegOpnd::New(nullptr, lowererMDArch.GetRegReturnAsmJs(regType), regType, m_func);
retReg = IR::RegOpnd::New(regType, m_func);
retReg->SetReg(lowererMDArch.GetRegReturnAsmJs(regType));
}
else
#endif
{
retReg = IR::RegOpnd::New(nullptr, lowererMDArch.GetRegReturn(TyMachReg), TyMachReg, m_func);
retReg = IR::RegOpnd::New(TyMachReg, m_func);
retReg->SetReg(lowererMDArch.GetRegReturn(TyMachReg));
}

retInstr->SetDst(retReg);

return this->ChangeToAssign(retInstr);
Lowerer::InsertMove(retReg, retInstr->UnlinkSrc1(), retInstr);
retInstr->SetSrc1(retReg);
return retInstr;
}

///----------------------------------------------------------------------------
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3 changes: 3 additions & 0 deletions lib/Backend/amd64/LowererMDArch.cpp
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Expand Up @@ -3030,6 +3030,9 @@ LowererMDArch::FinalLower()
{
switch (instr->m_opcode)
{
case Js::OpCode::Ret:
instr->Remove();
break;
case Js::OpCode::LdArgSize:
Assert(this->m_func->HasTry());
instr->m_opcode = Js::OpCode::MOV;
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11 changes: 8 additions & 3 deletions lib/Backend/arm/LowerMD.cpp
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Expand Up @@ -2424,11 +2424,13 @@ LowererMD::CreateAssign(IR::Opnd *dst, IR::Opnd *src, IR::Instr *instrInsertPt,
IR::Instr *
LowererMD::LowerRet(IR::Instr * retInstr)
{
IR::RegOpnd *retReg = IR::RegOpnd::New(nullptr, RETURN_REG, TyMachReg, m_func);
IR::RegOpnd *retReg = IR::RegOpnd::New(TyMachReg, m_func);
retReg->SetReg(RETURN_REG);
Lowerer::InsertMove(retReg, retInstr->UnlinkSrc1(), retInstr);

retInstr->SetDst(retReg);
retInstr->SetSrc1(retReg);

return this->ChangeToAssign(retInstr);
return retInstr;
}


Expand Down Expand Up @@ -8675,6 +8677,9 @@ LowererMD::FinalLower()

switch (instr->m_opcode)
{
case Js::OpCode::Ret:
instr->Remove();
break;
case Js::OpCode::Leave:
Assert(this->m_func->DoOptimizeTry() && !this->m_func->IsLoopBodyInTry());
instrPrev = this->LowerLeave(instr, instr->AsBranchInstr()->GetTarget(), true /*fromFinalLower*/);
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3 changes: 3 additions & 0 deletions lib/Backend/i386/LowererMDArch.cpp
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Expand Up @@ -3970,6 +3970,9 @@ LowererMDArch::FinalLower()
{
switch (instr->m_opcode)
{
case Js::OpCode::Ret:
instr->Remove();
break;
case Js::OpCode::Leave:
Assert(this->m_func->DoOptimizeTry() && !this->m_func->IsLoopBodyInTry());
this->lowererMD->LowerLeave(instr, instr->AsBranchInstr()->GetTarget(), true /*fromFinalLower*/);
Expand Down