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Description
Hi,
Some gowin families have different names but that is because of how the SoC is configured, the FPGA silicon is still the same. For example, GW1NR-9C and GW1N-9C both work with nextpnr and have the same FPGA silicon. However, to get the GW1NR- 9C to work in nextpnr, you need to pass GW1N-9C as the family (no R), even though technically gowin considers them a different family.
I have modified apicula so that it fixes the IDCODE part of the problem, but I would also like to try to modify nextpnr so that when you pass GW1NR-9C, internally it knows that this is an alias and it goes back to GW1N-9C. I have modified apicula to generate a family_info.json
file which maps the family to the "base family" (ie, the family corresponding to the FPGA silicon) from the vendor tools.
There are a few approaches I can think of, but I'd really like to know which would be best for me to pursue:
- Copy or symlink the chipdbs during build so that all families are defined
- Edit
gowin/main.cc
to load this JSON file at runtime and then change from the alias back to the base family - Generate some sort of cc file which contains the map for family -> base family at build time from the JSON, and then edit
gowin/main.cc
to look in this and change the alias to the base family - Something else?
One thing I have noticed is that there is no JSON reader in this project, so that sort of precludes option 2. And I'm not quite sure how to generate the cc file - are python scripts allowed in the build system? Or maybe it could be part of gowin_bba
?
I would appreciate any thoughts on this.
Related issue here: YosysHQ/apicula#206 and PR YosysHQ/apicula#210