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2 parents 3bcb12a + f968e85 commit 53d746dCopy full SHA for 53d746d
examples/himbaechel/ioregs.v
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+module top (
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+ input clk,
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+ input key_i,
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+ input rst_i,
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+ output [`LEDS_NR-1:0] led
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+);
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+
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+wire key = key_i ^ `INV_BTN;
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+wire reset = rst_i ^ `INV_BTN;
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+reg [25:0] ctr_q;
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+wire [25:0] ctr_d;
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+always @(posedge clk) begin
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+ if (reset) begin
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+ ctr_q <= ctr_d;
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+ end
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+end
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+reg [`LEDS_NR - 2:0] led_r;
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+assign led = {ctr_q[25:25], led_r};
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+assign ctr_d = ctr_q + 1'b1;
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+ if (!key) begin
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+ led_r <= ctr_q[25:25-(`LEDS_NR - 2)];
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+endmodule
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