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PetervdPerk-NXPPetervdPerk-NXP
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MR-CANHUBK344 NXP B3RB Rover support (#23897)
* s32k3xx: EMIOS allow independent frequencies for each channel * mr-canhubk3: update config * mr-canhubk344: Fix adap board detect * mr-canhubk344: Use LPSPI1 (Port P1A) for SD card * airframes: Add B3RB Ackermann rover config See https://nxp.gitbook.io/mr-b3rb for more information about the NXP B3RB platform. PX4 Support basic control for now
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-41
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12 files changed

+172
-41
lines changed

‎ROMFS/px4fmu_common/init.d/airframes/51002_nxp_b3rb‎

Lines changed: 31 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,31 @@
1+
#!/bin/sh
2+
#
3+
# @name NXP B3RB Rover Ackermann
4+
#
5+
# @type Rover
6+
# @class Rover
7+
#
8+
# @board px4_fmu-v2 exclude
9+
# @board bitcraze_crazyflie exclude
10+
#
11+
12+
. ${R}etc/init.d/rc.rover_ackermann_defaults
13+
14+
param set-default BAT1_N_CELLS 3
15+
16+
# Set geometry & output configration
17+
param set-default PWM_MAIN_FUNC1 201
18+
param set-default PWM_MAIN_FUNC2 101
19+
param set-default PWM_MAIN_FUNC3 101
20+
param set-default PWM_MAIN_DIS1 1500
21+
param set-default PWM_MAIN_DIS2 0
22+
param set-default PWM_MAIN_DIS3 1500
23+
param set-default PWM_MAIN_MIN1 1000
24+
param set-default PWM_MAIN_MIN2 2500
25+
param set-default PWM_MAIN_MIN3 0
26+
param set-default PWM_MAIN_MAX1 2000
27+
param set-default PWM_MAIN_MAX2 2500
28+
param set-default PWM_MAIN_MAX3 50
29+
param set-default PWM_MAIN_TIM0 400
30+
param set-default PWM_MAIN_TIM1 400
31+
param set-default PWM_MAIN_TIM2 20000

‎ROMFS/px4fmu_common/init.d/airframes/CMakeLists.txt‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -153,6 +153,7 @@ if(CONFIG_MODULES_ROVER_ACKERMANN)
153153
# [51000, 51999] Ackermann rovers
154154
51000_generic_rover_ackermann
155155
51001_axial_scx10_2_trail_honcho
156+
51002_nxp_b3rb
156157
)
157158
endif()
158159

‎boards/nxp/mr-canhubk3/fmu.px4board‎

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,8 @@
11
# CONFIG_BOARD_ROMFSROOT is not set
22
CONFIG_DRIVERS_BAROMETER_BMP388=n
33
CONFIG_DRIVERS_MAGNETOMETER_BOSCH_BMM150=n
4+
CONFIG_ARCH_CHIP_S32K3XX=y
5+
CONFIG_BOARD_PWM_FREQ=1000000
46
CONFIG_BOARD_SERIAL_GPS1="/dev/ttyS1"
57
CONFIG_BOARD_SERIAL_GPS2="/dev/ttyS4"
68
CONFIG_BOARD_SERIAL_RC="/dev/ttyS5"
@@ -20,6 +22,7 @@ CONFIG_DRIVERS_DISTANCE_SENSOR_LIGHTWARE_SF45_SERIAL=y
2022
CONFIG_DRIVERS_GPS=y
2123
CONFIG_DRIVERS_IRLOCK=y
2224
CONFIG_DRIVERS_RC_INPUT=y
25+
CONFIG_DRIVERS_ROBOCLAW=y
2326
CONFIG_DRIVERS_SAFETY_BUTTON=y
2427
CONFIG_DRIVERS_UAVCAN=y
2528
CONFIG_EXAMPLES_FAKE_GPS=y
@@ -33,9 +36,10 @@ CONFIG_MODULES_EVENTS=y
3336
CONFIG_MODULES_FLIGHT_MODE_MANAGER=y
3437
CONFIG_MODULES_FW_ATT_CONTROL=y
3538
CONFIG_MODULES_FW_AUTOTUNE_ATTITUDE_CONTROL=y
36-
CONFIG_MODULES_FW_MODE_MANAGER=y
3739
CONFIG_MODULES_FW_LATERAL_LONGITUDINAL_CONTROL=y
40+
CONFIG_MODULES_FW_MODE_MANAGER=y
3841
CONFIG_MODULES_FW_RATE_CONTROL=y
42+
CONFIG_MODULES_GIMBAL=y
3943
CONFIG_MODULES_GYRO_CALIBRATION=y
4044
CONFIG_MODULES_GYRO_FFT=y
4145
CONFIG_MODULES_LANDING_TARGET_ESTIMATOR=y
@@ -50,8 +54,10 @@ CONFIG_MODULES_MC_AUTOTUNE_ATTITUDE_CONTROL=y
5054
CONFIG_MODULES_MC_HOVER_THRUST_ESTIMATOR=y
5155
CONFIG_MODULES_MC_POS_CONTROL=y
5256
CONFIG_MODULES_MC_RATE_CONTROL=y
53-
CONFIG_MODULES_NAVIGATOR=y
5457
CONFIG_MODULES_RC_UPDATE=y
58+
CONFIG_MODULES_ROVER_ACKERMANN=y
59+
CONFIG_MODULES_ROVER_DIFFERENTIAL=y
60+
CONFIG_MODULES_ROVER_MECANUM=y
5561
CONFIG_MODULES_TEMPERATURE_COMPENSATION=y
5662
CONFIG_MODULES_UXRCE_DDS_CLIENT=y
5763
CONFIG_MODULES_VTOL_ATT_CONTROL=y

‎boards/nxp/mr-canhubk3/nuttx-config/nsh/defconfig‎

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -94,6 +94,7 @@ CONFIG_FAT_LFN_ALIAS_HASH=y
9494
CONFIG_FDCLONE_STDIO=y
9595
CONFIG_FS26_SPI_FREQUENCY=5000000
9696
CONFIG_FSUTILS_IPCFG=y
97+
CONFIG_FS_BINFS=y
9798
CONFIG_FS_CROMFS=y
9899
CONFIG_FS_FAT=y
99100
CONFIG_FS_FATTIME=y
@@ -126,16 +127,24 @@ CONFIG_LPUART0_IFLOWCONTROL=y
126127
CONFIG_LPUART0_OFLOWCONTROL=y
127128
CONFIG_LPUART0_RXBUFSIZE=640
128129
CONFIG_LPUART0_RXDMA=y
130+
CONFIG_LPUART0_TXBUFSIZE=1100
129131
CONFIG_LPUART0_TXDMA=y
130132
CONFIG_LPUART13_RXDMA=y
131133
CONFIG_LPUART13_TXDMA=y
132134
CONFIG_LPUART14_RXDMA=y
133135
CONFIG_LPUART14_TXDMA=y
136+
CONFIG_LPUART1_RXBUFSIZE=600
134137
CONFIG_LPUART1_RXDMA=y
138+
CONFIG_LPUART1_TXBUFSIZE=1100
135139
CONFIG_LPUART1_TXDMA=y
136140
CONFIG_LPUART2_RXDMA=y
137141
CONFIG_LPUART2_SERIAL_CONSOLE=y
138142
CONFIG_LPUART2_TXDMA=y
143+
CONFIG_LPUART4_RXBUFSIZE=600
144+
CONFIG_LPUART4_TXBUFSIZE=600
145+
CONFIG_LPUART7_RXDMA=y
146+
CONFIG_LPUART7_TXBUFSIZE=1500
147+
CONFIG_LPUART7_TXDMA=y
139148
CONFIG_MEMSET_64BIT=y
140149
CONFIG_MEMSET_OPTSPEED=y
141150
CONFIG_MMCSD=y
@@ -197,6 +206,7 @@ CONFIG_NSH_LINELEN=128
197206
CONFIG_NSH_MAXARGUMENTS=15
198207
CONFIG_NSH_MMCSDSPIPORTNO=1
199208
CONFIG_NSH_NESTDEPTH=8
209+
CONFIG_NSH_READLINE=y
200210
CONFIG_NSH_QUOTE=y
201211
CONFIG_NSH_ROMFSETC=y
202212
CONFIG_NSH_ROMFSSECTSIZE=128
@@ -213,6 +223,8 @@ CONFIG_PTHREAD_STACK_MIN=512
213223
CONFIG_RAM_SIZE=272000
214224
CONFIG_RAM_START=0x20400000
215225
CONFIG_RAW_BINARY=y
226+
CONFIG_READLINE_CMD_HISTORY=y
227+
CONFIG_READLINE_TABCOMPLETION=y
216228
CONFIG_S32K3XX_DTCM_HEAP=y
217229
CONFIG_S32K3XX_EDMA=y
218230
CONFIG_S32K3XX_EDMA_EDBG=y
@@ -280,7 +292,10 @@ CONFIG_STACK_COLORATION=y
280292
CONFIG_START_DAY=30
281293
CONFIG_START_MONTH=11
282294
CONFIG_STDIO_BUFFER_SIZE=256
295+
CONFIG_SYSTEM_CLE=y
283296
CONFIG_SYSTEM_DHCPC_RENEW=y
284297
CONFIG_SYSTEM_NSH=y
285298
CONFIG_SYSTEM_PING=y
299+
CONFIG_SYSTEM_SYSTEM=y
286300
CONFIG_TASK_NAME_SIZE=24
301+
CONFIG_USEC_PER_TICK=1000

‎boards/nxp/mr-canhubk3/src/board_config.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -112,7 +112,7 @@ __BEGIN_DECLS
112112

113113
/* To detect MR-CANHUBK3-ADAP board */
114114
#define BOARD_HAS_HW_VERSIONING 1
115-
#define CANHUBK3_ADAP_DETECT (PIN_PTA12 | GPIO_INPUT | GPIO_PULLUP)
115+
#define CANHUBK3_ADAP_DETECT (PIN_PTA11 | GPIO_INPUT | GPIO_PULLUP)
116116

117117

118118
/*

‎boards/nxp/mr-canhubk3/src/init.c‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -105,18 +105,18 @@ __EXPORT int board_app_initialize(uintptr_t arg)
105105

106106
/* Configure LPSPI1 peripheral chip select */
107107

108-
s32k3xx_pinconfig(PIN_LPSPI2_PCS);
108+
s32k3xx_pinconfig(PIN_LPSPI1_PCS);
109109

110110
/* Initialize the SPI driver for LPSPI1 */
111111

112-
struct spi_dev_s *g_lpspi2 = s32k3xx_lpspibus_initialize(2);
112+
struct spi_dev_s *g_lpspi1 = s32k3xx_lpspibus_initialize(1);
113113

114-
if (g_lpspi2 == NULL) {
115-
spierr("ERROR: FAILED to initialize LPSPI2\n");
114+
if (g_lpspi1 == NULL) {
115+
spierr("ERROR: FAILED to initialize LPSPI1\n");
116116
return -ENODEV;
117117
}
118118

119-
rv = mmcsd_spislotinitialize(0, 0, g_lpspi2);
119+
rv = mmcsd_spislotinitialize(0, 0, g_lpspi1);
120120

121121
if (rv < 0) {
122122
mcerr("ERROR: Failed to bind SPI port %d to SD slot %d\n",

‎boards/nxp/mr-canhubk3/src/timer_config.cpp‎

Lines changed: 16 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -51,18 +51,25 @@
5151

5252

5353
constexpr io_timers_t io_timers[MAX_IO_TIMERS] = {
54-
initIOTimer(Timer::EMIOS0)
54+
initIOTimer(Timer::EMIOS0_Channel0, Timer::Channel0),
55+
initIOTimer(Timer::EMIOS0_Channel1, Timer::Channel1),
56+
initIOTimer(Timer::EMIOS0_Channel2, Timer::Channel2),
57+
initIOTimer(Timer::EMIOS0_Channel3, Timer::Channel3),
58+
initIOTimer(Timer::EMIOS0_Channel4, Timer::Channel4),
59+
initIOTimer(Timer::EMIOS0_Channel5, Timer::Channel5),
60+
initIOTimer(Timer::EMIOS0_Channel6, Timer::Channel6),
61+
initIOTimer(Timer::EMIOS0_Channel7, Timer::Channel7),
5562
};
5663

5764
constexpr timer_io_channels_t timer_io_channels[MAX_TIMER_IO_CHANNELS] = {
58-
initIOTimerChannel(io_timers, {Timer::EMIOS0, Timer::Channel0}, PIN_EMIOS0_CH0_1),
59-
initIOTimerChannel(io_timers, {Timer::EMIOS0, Timer::Channel1}, PIN_EMIOS0_CH1_1),
60-
initIOTimerChannel(io_timers, {Timer::EMIOS0, Timer::Channel2}, PIN_EMIOS0_CH2_1),
61-
initIOTimerChannel(io_timers, {Timer::EMIOS0, Timer::Channel3}, PIN_EMIOS0_CH3_2),
62-
initIOTimerChannel(io_timers, {Timer::EMIOS0, Timer::Channel4}, PIN_EMIOS0_CH4_2),
63-
initIOTimerChannel(io_timers, {Timer::EMIOS0, Timer::Channel5}, PIN_EMIOS0_CH5_2),
64-
initIOTimerChannel(io_timers, {Timer::EMIOS0, Timer::Channel6}, PIN_EMIOS0_CH6_1),
65-
initIOTimerChannel(io_timers, {Timer::EMIOS0, Timer::Channel7}, PIN_EMIOS0_CH7_2),
65+
initIOTimerChannel(io_timers, {Timer::EMIOS0_Channel0, Timer::Channel0}, PIN_EMIOS0_CH0_1),
66+
initIOTimerChannel(io_timers, {Timer::EMIOS0_Channel1, Timer::Channel1}, PIN_EMIOS0_CH1_1),
67+
initIOTimerChannel(io_timers, {Timer::EMIOS0_Channel2, Timer::Channel2}, PIN_EMIOS0_CH2_1),
68+
initIOTimerChannel(io_timers, {Timer::EMIOS0_Channel3, Timer::Channel3}, PIN_EMIOS0_CH3_2),
69+
initIOTimerChannel(io_timers, {Timer::EMIOS0_Channel4, Timer::Channel4}, PIN_EMIOS0_CH4_2),
70+
initIOTimerChannel(io_timers, {Timer::EMIOS0_Channel5, Timer::Channel5}, PIN_EMIOS0_CH5_2),
71+
initIOTimerChannel(io_timers, {Timer::EMIOS0_Channel6, Timer::Channel6}, PIN_EMIOS0_CH6_1),
72+
initIOTimerChannel(io_timers, {Timer::EMIOS0_Channel7, Timer::Channel7}, PIN_EMIOS0_CH7_2),
6673
};
6774

6875
constexpr io_timers_channel_mapping_t io_timers_channel_mapping =

‎platforms/nuttx/src/px4/nxp/s32k3xx/include/px4_arch/hw_description.h‎

Lines changed: 58 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -46,10 +46,34 @@
4646

4747
namespace Timer
4848
{
49+
50+
51+
// Just to keep def extract_timer(line): happy
4952
enum Timer {
50-
EMIOS0 = 0,
51-
EMIOS1,
52-
EMIOS2,
53+
EMIOS0_Channel0,
54+
EMIOS0_Channel1,
55+
EMIOS0_Channel2,
56+
EMIOS0_Channel3,
57+
EMIOS0_Channel4,
58+
EMIOS0_Channel5,
59+
EMIOS0_Channel6,
60+
EMIOS0_Channel7,
61+
EMIOS1_Channel0,
62+
EMIOS1_Channel1,
63+
EMIOS1_Channel2,
64+
EMIOS1_Channel3,
65+
EMIOS1_Channel4,
66+
EMIOS1_Channel5,
67+
EMIOS1_Channel6,
68+
EMIOS1_Channel7,
69+
EMIOS2_Channel0,
70+
EMIOS2_Channel1,
71+
EMIOS2_Channel2,
72+
EMIOS2_Channel3,
73+
EMIOS2_Channel4,
74+
EMIOS2_Channel5,
75+
EMIOS2_Channel6,
76+
EMIOS2_Channel7,
5377
};
5478
enum Channel {
5579
Channel0 = 0,
@@ -70,11 +94,37 @@ struct TimerChannel {
7094
static inline constexpr uint32_t timerBaseRegister(Timer::Timer timer)
7195
{
7296
switch (timer) {
73-
case Timer::EMIOS0: return S32K3XX_EMIOS0_BASE;
74-
75-
case Timer::EMIOS1: return S32K3XX_EMIOS1_BASE;
76-
77-
case Timer::EMIOS2: return S32K3XX_EMIOS2_BASE;
97+
case Timer::EMIOS0_Channel0:
98+
case Timer::EMIOS0_Channel1:
99+
case Timer::EMIOS0_Channel2:
100+
case Timer::EMIOS0_Channel3:
101+
case Timer::EMIOS0_Channel4:
102+
case Timer::EMIOS0_Channel5:
103+
case Timer::EMIOS0_Channel6:
104+
case Timer::EMIOS0_Channel7:
105+
return S32K3XX_EMIOS0_BASE;
106+
107+
108+
109+
case Timer::EMIOS1_Channel0:
110+
case Timer::EMIOS1_Channel1:
111+
case Timer::EMIOS1_Channel2:
112+
case Timer::EMIOS1_Channel3:
113+
case Timer::EMIOS1_Channel4:
114+
case Timer::EMIOS1_Channel5:
115+
case Timer::EMIOS1_Channel6:
116+
case Timer::EMIOS1_Channel7:
117+
return S32K3XX_EMIOS1_BASE;
118+
119+
case Timer::EMIOS2_Channel0:
120+
case Timer::EMIOS2_Channel1:
121+
case Timer::EMIOS2_Channel2:
122+
case Timer::EMIOS2_Channel3:
123+
case Timer::EMIOS2_Channel4:
124+
case Timer::EMIOS2_Channel5:
125+
case Timer::EMIOS2_Channel6:
126+
case Timer::EMIOS2_Channel7:
127+
return S32K3XX_EMIOS2_BASE;
78128
}
79129

80130
return 0;

‎platforms/nuttx/src/px4/nxp/s32k3xx/include/px4_arch/io_timer.h‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -45,7 +45,7 @@
4545
#pragma once
4646
__BEGIN_DECLS
4747
/* configuration limits */
48-
#define MAX_IO_TIMERS 1
48+
#define MAX_IO_TIMERS 8
4949
#define MAX_TIMER_IO_CHANNELS 8
5050

5151
#define MAX_LED_TIMERS 2
@@ -88,6 +88,7 @@ typedef struct io_timers_t {
8888
uint32_t vectorno_12_15; /* IRQ number */
8989
uint32_t vectorno_16_19; /* IRQ number */
9090
uint32_t vectorno_20_23; /* IRQ number */
91+
uint32_t channel;
9192
} io_timers_t;
9293

9394
typedef struct io_timers_channel_mapping_element_t {

‎platforms/nuttx/src/px4/nxp/s32k3xx/include/px4_arch/io_timer_hw_description.h‎

Lines changed: 28 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -55,15 +55,7 @@ static inline constexpr timer_io_channels_t initIOTimerChannel(const io_timers_t
5555
ret.timer_channel = (int)timer.channel + 1;
5656

5757
// find timer index
58-
ret.timer_index = 0xff;
59-
const uint32_t timer_base = timerBaseRegister(timer.timer);
60-
61-
for (int i = 0; i < MAX_IO_TIMERS; ++i) {
62-
if (io_timers_conf[i].base == timer_base) {
63-
ret.timer_index = i;
64-
break;
65-
}
66-
}
58+
ret.timer_index = timer.channel;
6759

6860
constexpr_assert(ret.timer_index != 0xff, "Timer not found");
6961

@@ -80,13 +72,20 @@ static inline constexpr timer_io_channels_t initIOTimerChannel(const io_timers_t
8072
* Ch20 - Ch23 = vectorno - 5
8173
*/
8274

83-
static inline constexpr io_timers_t initIOTimer(Timer::Timer timer)
75+
static inline constexpr io_timers_t initIOTimer(Timer::Timer timer, Timer::Channel channel)
8476
{
8577
bool nuttx_config_timer_enabled = false;
8678
io_timers_t ret{};
8779

8880
switch (timer) {
89-
case Timer::EMIOS0:
81+
case Timer::EMIOS0_Channel0:
82+
case Timer::EMIOS0_Channel1:
83+
case Timer::EMIOS0_Channel2:
84+
case Timer::EMIOS0_Channel3:
85+
case Timer::EMIOS0_Channel4:
86+
case Timer::EMIOS0_Channel5:
87+
case Timer::EMIOS0_Channel6:
88+
case Timer::EMIOS0_Channel7:
9089
ret.base = S32K3XX_EMIOS0_BASE;
9190
ret.clock_register = 0;
9291
ret.clock_bit = 0;
@@ -96,12 +95,20 @@ static inline constexpr io_timers_t initIOTimer(Timer::Timer timer)
9695
ret.vectorno_12_15 = S32K3XX_IRQ_EMIOS0_12_15;
9796
ret.vectorno_16_19 = S32K3XX_IRQ_EMIOS0_16_19;
9897
ret.vectorno_20_23 = S32K3XX_IRQ_EMIOS0_20_23;
98+
ret.channel = channel;
9999
#ifdef CONFIG_S32K3XX_EMIOS0
100100
nuttx_config_timer_enabled = true;
101101
#endif
102102
break;
103103

104-
case Timer::EMIOS1:
104+
case Timer::EMIOS1_Channel0:
105+
case Timer::EMIOS1_Channel1:
106+
case Timer::EMIOS1_Channel2:
107+
case Timer::EMIOS1_Channel3:
108+
case Timer::EMIOS1_Channel4:
109+
case Timer::EMIOS1_Channel5:
110+
case Timer::EMIOS1_Channel6:
111+
case Timer::EMIOS1_Channel7:
105112
ret.base = S32K3XX_EMIOS1_BASE;
106113
ret.clock_register = 0;
107114
ret.clock_bit = 0;
@@ -116,7 +123,15 @@ static inline constexpr io_timers_t initIOTimer(Timer::Timer timer)
116123
#endif
117124
break;
118125

119-
case Timer::EMIOS2:
126+
127+
case Timer::EMIOS2_Channel0:
128+
case Timer::EMIOS2_Channel1:
129+
case Timer::EMIOS2_Channel2:
130+
case Timer::EMIOS2_Channel3:
131+
case Timer::EMIOS2_Channel4:
132+
case Timer::EMIOS2_Channel5:
133+
case Timer::EMIOS2_Channel6:
134+
case Timer::EMIOS2_Channel7:
120135
ret.base = S32K3XX_EMIOS2_BASE;
121136
ret.clock_register = 0;
122137
ret.clock_bit = 0;

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