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@zhhuang-nv zhhuang-nv commented May 7, 2025

[fix] trtllm-gen mla kernel warnings

Description

We have some warnings like these when running MLA on SM100:

[TensorRT-LLM][WARNING] Fall back to unfused MHA for dataType = bf16, dataTypeKv = bf16, dataTypeOut = bf16, forceFp32Acc = false, attentionMaskType = causal, attentionInputLayout = packed_qkv, isSPadded = false, numQHeads = 32, numKvHeads = 1, numTokensPerBlock = 32, headSize = 576, headSizeV = 576, qScaling = 1.000000, attnLogitSoftcappingScale = 0.000000, hasAlibi = false, scaleAlibi = false, tpSize = 1, tpRank = 0, sageBlockSizeQ = 0, sageBlockSizeK = 0, sageBlockSizeV = 0 in sm_100.
[TensorRT-LLM][WARNING] TRTLLM-GEN does not support the requested kernels.

The warnings are introduced by #3862. This PR aims to fix them by always modifying fmhaParams no matter mIsGenerationMLA is true or false.

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@zhhuang-nv zhhuang-nv requested review from PerkzZheng and bobboli May 7, 2025 10:15
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This could solve the problem. But the better solution is that fmhaDispatcher should not be used when trtllmGen is enabled.

The code path of AttentionOp has been a bit messy (fmha/trtllm-gen/flashmla), especially with the introduction of MLA. Let's see if we can have an opportunity to refactor.

@zhhuang-nv zhhuang-nv force-pushed the fix-mla-kernel-warnings branch from 9aec810 to 4c799c5 Compare May 8, 2025 05:52
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@zhhuang-nv zhhuang-nv force-pushed the fix-mla-kernel-warnings branch from 4c799c5 to c6a7fe1 Compare May 8, 2025 08:43
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@zhhuang-nv zhhuang-nv force-pushed the fix-mla-kernel-warnings branch from c6a7fe1 to bc68d82 Compare May 9, 2025 02:18
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@zhhuang-nv zhhuang-nv force-pushed the fix-mla-kernel-warnings branch from bc68d82 to db11a37 Compare May 9, 2025 05:57
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@byshiue byshiue merged commit 0a36db0 into NVIDIA:main May 9, 2025
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@zhhuang-nv zhhuang-nv deleted the fix-mla-kernel-warnings branch May 15, 2025 07:34
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