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Merged
merged 1 commit into from
Mar 27, 2025
Merged

header updates for SPV_INTEL_ternary_bitwise_function #504

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2 changes: 2 additions & 0 deletions include/spirv/unified1/spirv.bf
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Expand Up @@ -1305,6 +1305,7 @@ namespace Spv
Subgroup2DBlockTransformINTEL = 6229,
Subgroup2DBlockTransposeINTEL = 6230,
SubgroupMatrixMultiplyAccumulateINTEL = 6236,
TernaryBitwiseFunctionINTEL = 6241,
GroupUniformArithmeticKHR = 6400,
TensorFloat32RoundingINTEL = 6425,
MaskedGatherScatterINTEL = 6427,
Expand Down Expand Up @@ -2430,6 +2431,7 @@ namespace Spv
OpSubgroup2DBlockPrefetchINTEL = 6234,
OpSubgroup2DBlockStoreINTEL = 6235,
OpSubgroupMatrixMultiplyAccumulateINTEL = 6237,
OpBitwiseFunctionINTEL = 6242,
OpGroupIMulKHR = 6401,
OpGroupFMulKHR = 6402,
OpGroupBitwiseAndKHR = 6403,
Expand Down
21 changes: 21 additions & 0 deletions include/spirv/unified1/spirv.core.grammar.json
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Expand Up @@ -10639,6 +10639,21 @@
"capabilities" : [ "SubgroupMatrixMultiplyAccumulateINTEL" ],
"version" : "None"
},
{
"opname" : "OpBitwiseFunctionINTEL",
"class" : "Bit",
"opcode" : 6242,
"operands" : [
{ "kind" : "IdResultType" },
{ "kind" : "IdResult" },
{ "kind" : "IdRef", "name" : "'A'" },
{ "kind" : "IdRef", "name" : "'B'" },
{ "kind" : "IdRef", "name" : "'C'" },
{ "kind" : "IdRef", "name" : "'LUTIndex'" }
],
"capabilities" : [ "TernaryBitwiseFunctionINTEL" ],
"version" : "None"
},
{
"opname" : "OpGroupIMulKHR",
"class" : "Group",
Expand Down Expand Up @@ -17246,6 +17261,12 @@
"extensions": [ "SPV_INTEL_subgroup_matrix_multiply_accumulate" ],
"version" : "None"
},
{
"enumerant" : "TernaryBitwiseFunctionINTEL",
"value" : 6241,
"extensions" : [ "SPV_INTEL_ternary_bitwise_function"],
"version" : "None"
},
{
"enumerant" : "GroupUniformArithmeticKHR",
"value" : 6400,
Expand Down
2 changes: 2 additions & 0 deletions include/spirv/unified1/spirv.cs
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Expand Up @@ -1304,6 +1304,7 @@ public enum Capability
Subgroup2DBlockTransformINTEL = 6229,
Subgroup2DBlockTransposeINTEL = 6230,
SubgroupMatrixMultiplyAccumulateINTEL = 6236,
TernaryBitwiseFunctionINTEL = 6241,
GroupUniformArithmeticKHR = 6400,
TensorFloat32RoundingINTEL = 6425,
MaskedGatherScatterINTEL = 6427,
Expand Down Expand Up @@ -2429,6 +2430,7 @@ public enum Op
OpSubgroup2DBlockPrefetchINTEL = 6234,
OpSubgroup2DBlockStoreINTEL = 6235,
OpSubgroupMatrixMultiplyAccumulateINTEL = 6237,
OpBitwiseFunctionINTEL = 6242,
OpGroupIMulKHR = 6401,
OpGroupFMulKHR = 6402,
OpGroupBitwiseAndKHR = 6403,
Expand Down
5 changes: 5 additions & 0 deletions include/spirv/unified1/spirv.h
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Expand Up @@ -1275,6 +1275,7 @@ typedef enum SpvCapability_ {
SpvCapabilitySubgroup2DBlockTransformINTEL = 6229,
SpvCapabilitySubgroup2DBlockTransposeINTEL = 6230,
SpvCapabilitySubgroupMatrixMultiplyAccumulateINTEL = 6236,
SpvCapabilityTernaryBitwiseFunctionINTEL = 6241,
SpvCapabilityGroupUniformArithmeticKHR = 6400,
SpvCapabilityTensorFloat32RoundingINTEL = 6425,
SpvCapabilityMaskedGatherScatterINTEL = 6427,
Expand Down Expand Up @@ -2366,6 +2367,7 @@ typedef enum SpvOp_ {
SpvOpSubgroup2DBlockPrefetchINTEL = 6234,
SpvOpSubgroup2DBlockStoreINTEL = 6235,
SpvOpSubgroupMatrixMultiplyAccumulateINTEL = 6237,
SpvOpBitwiseFunctionINTEL = 6242,
SpvOpGroupIMulKHR = 6401,
SpvOpGroupFMulKHR = 6402,
SpvOpGroupBitwiseAndKHR = 6403,
Expand Down Expand Up @@ -3170,6 +3172,7 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
case SpvOpSubgroup2DBlockPrefetchINTEL: *hasResult = false; *hasResultType = false; break;
case SpvOpSubgroup2DBlockStoreINTEL: *hasResult = false; *hasResultType = false; break;
case SpvOpSubgroupMatrixMultiplyAccumulateINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpBitwiseFunctionINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpGroupIMulKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpGroupFMulKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break;
Expand Down Expand Up @@ -4123,6 +4126,7 @@ inline const char* SpvCapabilityToString(SpvCapability value) {
case SpvCapabilitySubgroup2DBlockTransformINTEL: return "Subgroup2DBlockTransformINTEL";
case SpvCapabilitySubgroup2DBlockTransposeINTEL: return "Subgroup2DBlockTransposeINTEL";
case SpvCapabilitySubgroupMatrixMultiplyAccumulateINTEL: return "SubgroupMatrixMultiplyAccumulateINTEL";
case SpvCapabilityTernaryBitwiseFunctionINTEL: return "TernaryBitwiseFunctionINTEL";
case SpvCapabilityGroupUniformArithmeticKHR: return "GroupUniformArithmeticKHR";
case SpvCapabilityTensorFloat32RoundingINTEL: return "TensorFloat32RoundingINTEL";
case SpvCapabilityMaskedGatherScatterINTEL: return "MaskedGatherScatterINTEL";
Expand Down Expand Up @@ -5102,6 +5106,7 @@ inline const char* SpvOpToString(SpvOp value) {
case SpvOpSubgroup2DBlockPrefetchINTEL: return "OpSubgroup2DBlockPrefetchINTEL";
case SpvOpSubgroup2DBlockStoreINTEL: return "OpSubgroup2DBlockStoreINTEL";
case SpvOpSubgroupMatrixMultiplyAccumulateINTEL: return "OpSubgroupMatrixMultiplyAccumulateINTEL";
case SpvOpBitwiseFunctionINTEL: return "OpBitwiseFunctionINTEL";
case SpvOpGroupIMulKHR: return "OpGroupIMulKHR";
case SpvOpGroupFMulKHR: return "OpGroupFMulKHR";
case SpvOpGroupBitwiseAndKHR: return "OpGroupBitwiseAndKHR";
Expand Down
5 changes: 5 additions & 0 deletions include/spirv/unified1/spirv.hpp
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Expand Up @@ -1271,6 +1271,7 @@ enum Capability {
CapabilitySubgroup2DBlockTransformINTEL = 6229,
CapabilitySubgroup2DBlockTransposeINTEL = 6230,
CapabilitySubgroupMatrixMultiplyAccumulateINTEL = 6236,
CapabilityTernaryBitwiseFunctionINTEL = 6241,
CapabilityGroupUniformArithmeticKHR = 6400,
CapabilityTensorFloat32RoundingINTEL = 6425,
CapabilityMaskedGatherScatterINTEL = 6427,
Expand Down Expand Up @@ -2362,6 +2363,7 @@ enum Op {
OpSubgroup2DBlockPrefetchINTEL = 6234,
OpSubgroup2DBlockStoreINTEL = 6235,
OpSubgroupMatrixMultiplyAccumulateINTEL = 6237,
OpBitwiseFunctionINTEL = 6242,
OpGroupIMulKHR = 6401,
OpGroupFMulKHR = 6402,
OpGroupBitwiseAndKHR = 6403,
Expand Down Expand Up @@ -3166,6 +3168,7 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
case OpSubgroup2DBlockPrefetchINTEL: *hasResult = false; *hasResultType = false; break;
case OpSubgroup2DBlockStoreINTEL: *hasResult = false; *hasResultType = false; break;
case OpSubgroupMatrixMultiplyAccumulateINTEL: *hasResult = true; *hasResultType = true; break;
case OpBitwiseFunctionINTEL: *hasResult = true; *hasResultType = true; break;
case OpGroupIMulKHR: *hasResult = true; *hasResultType = true; break;
case OpGroupFMulKHR: *hasResult = true; *hasResultType = true; break;
case OpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break;
Expand Down Expand Up @@ -4119,6 +4122,7 @@ inline const char* CapabilityToString(Capability value) {
case CapabilitySubgroup2DBlockTransformINTEL: return "Subgroup2DBlockTransformINTEL";
case CapabilitySubgroup2DBlockTransposeINTEL: return "Subgroup2DBlockTransposeINTEL";
case CapabilitySubgroupMatrixMultiplyAccumulateINTEL: return "SubgroupMatrixMultiplyAccumulateINTEL";
case CapabilityTernaryBitwiseFunctionINTEL: return "TernaryBitwiseFunctionINTEL";
case CapabilityGroupUniformArithmeticKHR: return "GroupUniformArithmeticKHR";
case CapabilityTensorFloat32RoundingINTEL: return "TensorFloat32RoundingINTEL";
case CapabilityMaskedGatherScatterINTEL: return "MaskedGatherScatterINTEL";
Expand Down Expand Up @@ -5098,6 +5102,7 @@ inline const char* OpToString(Op value) {
case OpSubgroup2DBlockPrefetchINTEL: return "OpSubgroup2DBlockPrefetchINTEL";
case OpSubgroup2DBlockStoreINTEL: return "OpSubgroup2DBlockStoreINTEL";
case OpSubgroupMatrixMultiplyAccumulateINTEL: return "OpSubgroupMatrixMultiplyAccumulateINTEL";
case OpBitwiseFunctionINTEL: return "OpBitwiseFunctionINTEL";
case OpGroupIMulKHR: return "OpGroupIMulKHR";
case OpGroupFMulKHR: return "OpGroupFMulKHR";
case OpGroupBitwiseAndKHR: return "OpGroupBitwiseAndKHR";
Expand Down
5 changes: 5 additions & 0 deletions include/spirv/unified1/spirv.hpp11
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Expand Up @@ -1271,6 +1271,7 @@ enum class Capability : unsigned {
Subgroup2DBlockTransformINTEL = 6229,
Subgroup2DBlockTransposeINTEL = 6230,
SubgroupMatrixMultiplyAccumulateINTEL = 6236,
TernaryBitwiseFunctionINTEL = 6241,
GroupUniformArithmeticKHR = 6400,
TensorFloat32RoundingINTEL = 6425,
MaskedGatherScatterINTEL = 6427,
Expand Down Expand Up @@ -2362,6 +2363,7 @@ enum class Op : unsigned {
OpSubgroup2DBlockPrefetchINTEL = 6234,
OpSubgroup2DBlockStoreINTEL = 6235,
OpSubgroupMatrixMultiplyAccumulateINTEL = 6237,
OpBitwiseFunctionINTEL = 6242,
OpGroupIMulKHR = 6401,
OpGroupFMulKHR = 6402,
OpGroupBitwiseAndKHR = 6403,
Expand Down Expand Up @@ -3166,6 +3168,7 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
case Op::OpSubgroup2DBlockPrefetchINTEL: *hasResult = false; *hasResultType = false; break;
case Op::OpSubgroup2DBlockStoreINTEL: *hasResult = false; *hasResultType = false; break;
case Op::OpSubgroupMatrixMultiplyAccumulateINTEL: *hasResult = true; *hasResultType = true; break;
case Op::OpBitwiseFunctionINTEL: *hasResult = true; *hasResultType = true; break;
case Op::OpGroupIMulKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpGroupFMulKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break;
Expand Down Expand Up @@ -4119,6 +4122,7 @@ inline const char* CapabilityToString(Capability value) {
case Capability::Subgroup2DBlockTransformINTEL: return "Subgroup2DBlockTransformINTEL";
case Capability::Subgroup2DBlockTransposeINTEL: return "Subgroup2DBlockTransposeINTEL";
case Capability::SubgroupMatrixMultiplyAccumulateINTEL: return "SubgroupMatrixMultiplyAccumulateINTEL";
case Capability::TernaryBitwiseFunctionINTEL: return "TernaryBitwiseFunctionINTEL";
case Capability::GroupUniformArithmeticKHR: return "GroupUniformArithmeticKHR";
case Capability::TensorFloat32RoundingINTEL: return "TensorFloat32RoundingINTEL";
case Capability::MaskedGatherScatterINTEL: return "MaskedGatherScatterINTEL";
Expand Down Expand Up @@ -5098,6 +5102,7 @@ inline const char* OpToString(Op value) {
case Op::OpSubgroup2DBlockPrefetchINTEL: return "OpSubgroup2DBlockPrefetchINTEL";
case Op::OpSubgroup2DBlockStoreINTEL: return "OpSubgroup2DBlockStoreINTEL";
case Op::OpSubgroupMatrixMultiplyAccumulateINTEL: return "OpSubgroupMatrixMultiplyAccumulateINTEL";
case Op::OpBitwiseFunctionINTEL: return "OpBitwiseFunctionINTEL";
case Op::OpGroupIMulKHR: return "OpGroupIMulKHR";
case Op::OpGroupFMulKHR: return "OpGroupFMulKHR";
case Op::OpGroupBitwiseAndKHR: return "OpGroupBitwiseAndKHR";
Expand Down
2 changes: 2 additions & 0 deletions include/spirv/unified1/spirv.json
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Expand Up @@ -1247,6 +1247,7 @@
"Subgroup2DBlockTransformINTEL": 6229,
"Subgroup2DBlockTransposeINTEL": 6230,
"SubgroupMatrixMultiplyAccumulateINTEL": 6236,
"TernaryBitwiseFunctionINTEL": 6241,
"GroupUniformArithmeticKHR": 6400,
"TensorFloat32RoundingINTEL": 6425,
"MaskedGatherScatterINTEL": 6427,
Expand Down Expand Up @@ -2349,6 +2350,7 @@
"OpSubgroup2DBlockPrefetchINTEL": 6234,
"OpSubgroup2DBlockStoreINTEL": 6235,
"OpSubgroupMatrixMultiplyAccumulateINTEL": 6237,
"OpBitwiseFunctionINTEL": 6242,
"OpGroupIMulKHR": 6401,
"OpGroupFMulKHR": 6402,
"OpGroupBitwiseAndKHR": 6403,
Expand Down
2 changes: 2 additions & 0 deletions include/spirv/unified1/spirv.lua
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Expand Up @@ -1262,6 +1262,7 @@ spv = {
Subgroup2DBlockTransformINTEL = 6229,
Subgroup2DBlockTransposeINTEL = 6230,
SubgroupMatrixMultiplyAccumulateINTEL = 6236,
TernaryBitwiseFunctionINTEL = 6241,
GroupUniformArithmeticKHR = 6400,
TensorFloat32RoundingINTEL = 6425,
MaskedGatherScatterINTEL = 6427,
Expand Down Expand Up @@ -2353,6 +2354,7 @@ spv = {
OpSubgroup2DBlockPrefetchINTEL = 6234,
OpSubgroup2DBlockStoreINTEL = 6235,
OpSubgroupMatrixMultiplyAccumulateINTEL = 6237,
OpBitwiseFunctionINTEL = 6242,
OpGroupIMulKHR = 6401,
OpGroupFMulKHR = 6402,
OpGroupBitwiseAndKHR = 6403,
Expand Down
2 changes: 2 additions & 0 deletions include/spirv/unified1/spirv.py
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Expand Up @@ -1233,6 +1233,7 @@
'Subgroup2DBlockTransformINTEL' : 6229,
'Subgroup2DBlockTransposeINTEL' : 6230,
'SubgroupMatrixMultiplyAccumulateINTEL' : 6236,
'TernaryBitwiseFunctionINTEL' : 6241,
'GroupUniformArithmeticKHR' : 6400,
'TensorFloat32RoundingINTEL' : 6425,
'MaskedGatherScatterINTEL' : 6427,
Expand Down Expand Up @@ -2297,6 +2298,7 @@
'OpSubgroup2DBlockPrefetchINTEL' : 6234,
'OpSubgroup2DBlockStoreINTEL' : 6235,
'OpSubgroupMatrixMultiplyAccumulateINTEL' : 6237,
'OpBitwiseFunctionINTEL' : 6242,
'OpGroupIMulKHR' : 6401,
'OpGroupFMulKHR' : 6402,
'OpGroupBitwiseAndKHR' : 6403,
Expand Down
2 changes: 2 additions & 0 deletions include/spirv/unified1/spv.d
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Expand Up @@ -1307,6 +1307,7 @@ enum Capability : uint
Subgroup2DBlockTransformINTEL = 6229,
Subgroup2DBlockTransposeINTEL = 6230,
SubgroupMatrixMultiplyAccumulateINTEL = 6236,
TernaryBitwiseFunctionINTEL = 6241,
GroupUniformArithmeticKHR = 6400,
TensorFloat32RoundingINTEL = 6425,
MaskedGatherScatterINTEL = 6427,
Expand Down Expand Up @@ -2432,6 +2433,7 @@ enum Op : uint
OpSubgroup2DBlockPrefetchINTEL = 6234,
OpSubgroup2DBlockStoreINTEL = 6235,
OpSubgroupMatrixMultiplyAccumulateINTEL = 6237,
OpBitwiseFunctionINTEL = 6242,
OpGroupIMulKHR = 6401,
OpGroupFMulKHR = 6402,
OpGroupBitwiseAndKHR = 6403,
Expand Down