• 👋 Hi, I’m @Aakil
• 👀 I’m interested in VLSI, SOC Architecture, SOC verification/validation, IP verification, RiscV, verilog, System Verilog FPGA validation
• 🌱 I’m currently learning RiscV architecture, RiscV Advanced Interrupt Architecture, WorldGuard
• 💞️ I’m looking to collaborate on RiscV, verification/validation of IPs FPGA validation of IPs
• 📫 How to reach me [email protected]