@@ -10,7 +10,14 @@ use crate::riscv;
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use crate :: rvc;
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use crate :: terminal;
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pub use csr:: * ;
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- use fp:: { RoundingMode , Sf , Sf32 , Sf64 , cvt_i32_sf32, cvt_i64_sf32, cvt_u32_sf32, cvt_u64_sf32} ;
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+ use fp:: RoundingMode ;
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+ use fp:: Sf ;
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+ use fp:: Sf32 ;
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+ use fp:: Sf64 ;
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+ use fp:: cvt_i32_sf32;
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+ use fp:: cvt_i64_sf32;
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+ use fp:: cvt_u32_sf32;
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+ use fp:: cvt_u64_sf32;
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use log;
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use num_traits:: FromPrimitive ;
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use riscv:: MemoryAccessType ;
@@ -30,9 +37,7 @@ pub const PG_SHIFT: usize = 12; // 4K page size
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pub type Reg = Bounded < 65 > ;
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impl Reg {
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#[ must_use]
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- pub const fn is_x0_dest ( self ) -> bool {
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- self . get ( ) == 64
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- }
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+ pub const fn is_x0_dest ( self ) -> bool { self . get ( ) == 64 }
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}
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/// Generate a source integer `Reg`
@@ -155,9 +160,7 @@ impl Cpu {
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#[ allow( clippy:: inline_always) ]
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#[ inline( always) ]
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- fn read_x ( & self , r : Reg ) -> i64 {
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- self . rf [ r]
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- }
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+ fn read_x ( & self , r : Reg ) -> i64 { self . rf [ r] }
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#[ allow( clippy:: inline_always) ]
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#[ inline( always) ]
@@ -169,26 +172,20 @@ impl Cpu {
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/// Reads Program counter
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#[ must_use]
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#[ allow( clippy:: cast_sign_loss) ]
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- pub const fn read_pc ( & self ) -> i64 {
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- self . pc
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- }
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+ pub const fn read_pc ( & self ) -> i64 { self . pc }
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/// Updates Program Counter
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///
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/// # Arguments
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/// * `value`
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- pub const fn update_pc ( & mut self , value : i64 ) {
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- self . pc = value & !1 ;
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- }
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+ pub const fn update_pc ( & mut self , value : i64 ) { self . pc = value & !1 ; }
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/// Reads integer register
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///
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/// # Arguments
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/// * `reg` Register number. Must be 0-31
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#[ must_use]
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- pub fn read_register ( & self , reg : Reg ) -> i64 {
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- self . rf [ reg]
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- }
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+ pub fn read_register ( & self , reg : Reg ) -> i64 { self . rf [ reg] }
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/// Checks that float instructions are enabled and
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/// that the rounding mode is legal (XXX this should be part of format!)
@@ -203,7 +200,8 @@ impl Cpu {
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}
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}
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- /// Runs program N cycles. Fetch, decode, and execution are completed in a cycle so far.
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+ /// Runs program N cycles. Fetch, decode, and execution are completed in a
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+ /// cycle so far.
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#[ allow( clippy:: cast_sign_loss) ]
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pub fn run_soc ( & mut self , cpu_steps : usize ) {
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for _ in 0 ..cpu_steps {
@@ -252,10 +250,12 @@ impl Cpu {
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#[ allow( clippy:: cast_sign_loss) ]
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fn handle_interrupt ( & mut self ) {
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- use self :: Trap :: {
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- MachineExternalInterrupt , MachineSoftwareInterrupt , MachineTimerInterrupt ,
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- SupervisorExternalInterrupt , SupervisorSoftwareInterrupt , SupervisorTimerInterrupt ,
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- } ;
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+ use self :: Trap :: MachineExternalInterrupt ;
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+ use self :: Trap :: MachineSoftwareInterrupt ;
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+ use self :: Trap :: MachineTimerInterrupt ;
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+ use self :: Trap :: SupervisorExternalInterrupt ;
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+ use self :: Trap :: SupervisorSoftwareInterrupt ;
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+ use self :: Trap :: SupervisorTimerInterrupt ;
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let minterrupt = self . mmu . mip & self . read_csr_raw ( Csr :: Mie ) ;
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if minterrupt == 0 {
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return ;
@@ -284,7 +284,8 @@ impl Cpu {
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fn handle_exception ( & mut self , exc : & Exception ) {
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// XXX If we pass in the address we don't need
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- // self.pc, but that requires us to call handle exception from a centrol location with access to the pc.
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+ // self.pc, but that requires us to call handle exception from a centrol
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+ // location with access to the pc.
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self . handle_trap ( exc, self . insn_addr , false ) ;
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}
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@@ -456,14 +457,16 @@ impl Cpu {
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PrivMode :: M => {
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let status = self . read_csr_raw ( Csr :: Mstatus ) ;
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let mie = ( status >> 3 ) & 1 ;
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- // clear MIE[3], override MPIE[7] with MIE[3], override MPP[12:11] with current privilege encoding
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+ // clear MIE[3], override MPIE[7] with MIE[3], override MPP[12:11] with current
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+ // privilege encoding
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let new_status = ( status & !0x1888 ) | ( mie << 7 ) | ( current_priv_encoding << 11 ) ;
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self . write_csr_raw ( Csr :: Mstatus , new_status) ;
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}
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PrivMode :: S => {
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let status = self . read_csr_raw ( Csr :: Sstatus ) ;
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let sie = ( status >> 1 ) & 1 ;
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- // clear SIE[1], override SPIE[5] with SIE[1], override SPP[8] with current privilege encoding
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+ // clear SIE[1], override SPIE[5] with SIE[1], override SPP[8] with current
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+ // privilege encoding
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let new_status =
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( status & !0x122 ) | ( sie << 5 ) | ( ( current_priv_encoding & 1 ) << 8 ) ;
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self . write_csr_raw ( Csr :: Sstatus , new_status) ;
@@ -493,15 +496,17 @@ impl Cpu {
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Some ( csr)
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}
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- // XXX This is still so far from complete; copy the logic from Dromajo and review
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- // each CSR. Do Not Blanket allow reads and writes from unsupported CSRs
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+ // XXX This is still so far from complete; copy the logic from Dromajo and
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+ // review each CSR. Do Not Blanket allow reads and writes from unsupported
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+ // CSRs
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#[ allow( clippy:: cast_sign_loss) ]
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fn read_csr ( & self , csrno : u16 ) -> Result < u64 , Exception > {
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use PrivMode :: S ;
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let illegal = Err ( Exception {
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trap : Trap :: IllegalInstruction ,
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- tval : i64:: from ( self . insn ) , // XXX we could assign this outside, eliminating the need for self.insn here
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+ tval : i64:: from ( self . insn ) , /* XXX we could assign this outside, eliminating the need
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+ * for self.insn here */
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} ) ;
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let Some ( csr) = self . has_csr_access_privilege ( csrno) else {
@@ -524,7 +529,8 @@ impl Cpu {
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fn write_csr ( & mut self , csrno : u16 , mut value : u64 ) -> Result < ( ) , Exception > {
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let illegal = Err ( Exception {
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trap : Trap :: IllegalInstruction ,
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- tval : i64:: from ( self . insn ) , // XXX we could assign this outside, eliminating the need for self.insn here
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+ tval : i64:: from ( self . insn ) , /* XXX we could assign this outside, eliminating the need
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+ * for self.insn here */
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} ) ;
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let Some ( csr) = self . has_csr_access_privilege ( csrno) else {
@@ -644,32 +650,22 @@ impl Cpu {
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self . mmu . satp = value;
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self . mmu . clear_page_cache ( ) ;
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}
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- /*Csr::Cycle |*/ Csr :: Mcycle => self . cycle = value,
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+ /* Csr::Cycle | */ Csr :: Mcycle => self . cycle = value,
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_ => {
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self . csr [ csr as usize ] = value;
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}
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}
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}
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- fn _set_fcsr_nv ( & mut self ) {
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- self . add_to_fflags ( 0x10 ) ;
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- }
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+ fn _set_fcsr_nv ( & mut self ) { self . add_to_fflags ( 0x10 ) ; }
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- fn set_fcsr_dz ( & mut self ) {
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- self . add_to_fflags ( 8 ) ;
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- }
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+ fn set_fcsr_dz ( & mut self ) { self . add_to_fflags ( 8 ) ; }
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- fn _set_fcsr_of ( & mut self ) {
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- self . add_to_fflags ( 4 ) ;
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- }
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+ fn _set_fcsr_of ( & mut self ) { self . add_to_fflags ( 4 ) ; }
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- fn _set_fcsr_uf ( & mut self ) {
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- self . add_to_fflags ( 2 ) ;
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- }
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+ fn _set_fcsr_uf ( & mut self ) { self . add_to_fflags ( 2 ) ; }
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- fn _set_fcsr_nx ( & mut self ) {
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- self . add_to_fflags ( 1 ) ;
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- }
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+ fn _set_fcsr_nx ( & mut self ) { self . add_to_fflags ( 1 ) ; }
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/// Disassembles an instruction pointed by Program Counter and
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/// and return the [possibly] writeback register
@@ -702,9 +698,7 @@ impl Cpu {
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}
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/// Returns mutable `Mmu`
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- pub const fn get_mut_mmu ( & mut self ) -> & mut Mmu {
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- & mut self . mmu
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- }
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+ pub const fn get_mut_mmu ( & mut self ) -> & mut Mmu { & mut self . mmu }
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/// Returns mutable `Terminal`
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pub fn get_mut_terminal ( & mut self ) -> & mut Box < dyn Terminal > {
@@ -736,13 +730,9 @@ impl Cpu {
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}
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#[ allow( clippy:: cast_possible_truncation, clippy:: cast_sign_loss) ]
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- fn read_f64 ( & self , r : Reg ) -> f64 {
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- f64:: from_bits ( self . read_f ( r) as u64 )
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- }
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+ fn read_f64 ( & self , r : Reg ) -> f64 { f64:: from_bits ( self . read_f ( r) as u64 ) }
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- fn write_f64 ( & mut self , r : Reg , f : f64 ) {
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- self . write_f ( r, f. to_bits ( ) as i64 ) ;
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- }
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+ fn write_f64 ( & mut self , r : Reg , f : f64 ) { self . write_f ( r, f. to_bits ( ) as i64 ) ; }
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fn read_frm ( & self ) -> RoundingMode {
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assert_ne ! ( self . fs, 0 ) ;
@@ -2313,13 +2303,10 @@ const INSTRUCTIONS: [Instruction; INSTRUCTION_NUM] = [
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let f = parse_format_r ( word) ;
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let s1 = cpu. read_x ( f. rs1 ) as u64 ;
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let s2 = cpu. read_x ( f. rs2 ) as u64 ;
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- cpu. write_x (
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- f. rd ,
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- match s2 {
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- 0 => s1 as i64 ,
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- _ => s1. wrapping_rem ( s2) as i64 ,
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- } ,
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- ) ;
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+ cpu. write_x ( f. rd , match s2 {
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+ 0 => s1 as i64 ,
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+ _ => s1. wrapping_rem ( s2) as i64 ,
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+ } ) ;
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Ok ( ( ) )
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} ,
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disassemble : dump_format_r,
@@ -2401,13 +2388,10 @@ const INSTRUCTIONS: [Instruction; INSTRUCTION_NUM] = [
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let f = parse_format_r ( word) ;
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let s1 = cpu. read_x ( f. rs1 ) as u32 ;
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let s2 = cpu. read_x ( f. rs2 ) as u32 ;
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- cpu. write_x (
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- f. rd ,
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- match s2 {
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- 0 => i64:: from ( s1 as i32 ) ,
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- _ => i64:: from ( s1. wrapping_rem ( s2) as i32 ) ,
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- } ,
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- ) ;
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+ cpu. write_x ( f. rd , match s2 {
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+ 0 => i64:: from ( s1 as i32 ) ,
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+ _ => i64:: from ( s1. wrapping_rem ( s2) as i32 ) ,
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+ } ) ;
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Ok ( ( ) )
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} ,
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disassemble : dump_format_r,
@@ -3907,14 +3891,10 @@ mod test_cpu {
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use crate :: mmu:: DRAM_BASE ;
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use crate :: terminal:: DummyTerminal ;
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- fn create_cpu ( ) -> Cpu {
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- Cpu :: new ( Box :: new ( DummyTerminal :: new ( ) ) )
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- }
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+ fn create_cpu ( ) -> Cpu { Cpu :: new ( Box :: new ( DummyTerminal :: new ( ) ) ) }
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#[ test]
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- fn initialize ( ) {
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- let _cpu = create_cpu ( ) ;
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- }
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+ fn initialize ( ) { let _cpu = create_cpu ( ) ; }
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#[ test]
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fn update_pc ( ) {
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