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Haley Tengsinghome_lee
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arm: tegra: grouper: memory: update DVFS table (ver: 0704_15R7)
According to Tegra3 Errata v6 torvalds#26 (Rare memory controller deadlock condition) Bug 1013627 Rare memory controller deadlock condition (regarding to EACK) Bug 955082 Change-Id: I696a275b3921e485da195bf4d5f772c2d0050beb Signed-off-by: Haley Teng <[email protected]>
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arch/arm/mach-tegra/board-grouper-memory.c

Lines changed: 26 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@
2525
#include "fuse.h"
2626

2727

28-
static const struct tegra_emc_table Nakasi_dvfs_Elpida_table_0430[] = {
28+
static const struct tegra_emc_table Nakasi_dvfs_Elpida_table_0704_15R7[] = {
2929
{
3030
0x32, /* Rev 3.2 */
3131
25500, /* SDRAM frequency */
@@ -117,7 +117,7 @@ static const struct tegra_emc_table Nakasi_dvfs_Elpida_table_0430[] = {
117117
0x00000000, /* EMC_CTT */
118118
0x00000000, /* EMC_CTT_DURATION */
119119
0x80000287, /* EMC_DYN_SELF_REF_CONTROL */
120-
0x00020001, /* MC_EMEM_ARB_CFG */
120+
0x00030003, /* MC_EMEM_ARB_CFG */
121121
0xc0000010, /* MC_EMEM_ARB_OUTSTANDING_REQ */
122122
0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
123123
0x00000001, /* MC_EMEM_ARB_TIMING_RP */
@@ -237,7 +237,7 @@ static const struct tegra_emc_table Nakasi_dvfs_Elpida_table_0430[] = {
237237
0x00000000, /* EMC_CTT */
238238
0x00000000, /* EMC_CTT_DURATION */
239239
0x8000040b, /* EMC_DYN_SELF_REF_CONTROL */
240-
0x00010001, /* MC_EMEM_ARB_CFG */
240+
0x00010003, /* MC_EMEM_ARB_CFG */
241241
0xc0000010, /* MC_EMEM_ARB_OUTSTANDING_REQ */
242242
0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
243243
0x00000001, /* MC_EMEM_ARB_TIMING_RP */
@@ -357,7 +357,7 @@ static const struct tegra_emc_table Nakasi_dvfs_Elpida_table_0430[] = {
357357
0x00000000, /* EMC_CTT */
358358
0x00000000, /* EMC_CTT_DURATION */
359359
0x80000713, /* EMC_DYN_SELF_REF_CONTROL */
360-
0x00000001, /* MC_EMEM_ARB_CFG */
360+
0x00000003, /* MC_EMEM_ARB_CFG */
361361
0xc0000018, /* MC_EMEM_ARB_OUTSTANDING_REQ */
362362
0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
363363
0x00000001, /* MC_EMEM_ARB_TIMING_RP */
@@ -477,7 +477,7 @@ static const struct tegra_emc_table Nakasi_dvfs_Elpida_table_0430[] = {
477477
0x00000000, /* EMC_CTT */
478478
0x00000000, /* EMC_CTT_DURATION */
479479
0x80000d22, /* EMC_DYN_SELF_REF_CONTROL */
480-
0x00000003, /* MC_EMEM_ARB_CFG */
480+
0x00000006, /* MC_EMEM_ARB_CFG */
481481
0xc0000025, /* MC_EMEM_ARB_OUTSTANDING_REQ */
482482
0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
483483
0x00000001, /* MC_EMEM_ARB_TIMING_RP */
@@ -597,7 +597,7 @@ static const struct tegra_emc_table Nakasi_dvfs_Elpida_table_0430[] = {
597597
0x00000000, /* EMC_CTT */
598598
0x00000000, /* EMC_CTT_DURATION */
599599
0x800014d4, /* EMC_DYN_SELF_REF_CONTROL */
600-
0x00000005, /* MC_EMEM_ARB_CFG */
600+
0x0000000a, /* MC_EMEM_ARB_CFG */
601601
0xc000003d, /* MC_EMEM_ARB_OUTSTANDING_REQ */
602602
0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
603603
0x00000002, /* MC_EMEM_ARB_TIMING_RP */
@@ -717,7 +717,7 @@ static const struct tegra_emc_table Nakasi_dvfs_Elpida_table_0430[] = {
717717
0x00000000, /* EMC_CTT */
718718
0x00000000, /* EMC_CTT_DURATION */
719719
0x800028a5, /* EMC_DYN_SELF_REF_CONTROL */
720-
0x0000000a, /* MC_EMEM_ARB_CFG */
720+
0x00000014, /* MC_EMEM_ARB_CFG */
721721
0xc0000079, /* MC_EMEM_ARB_OUTSTANDING_REQ */
722722
0x00000003, /* MC_EMEM_ARB_TIMING_RCD */
723723
0x00000004, /* MC_EMEM_ARB_TIMING_RP */
@@ -748,7 +748,7 @@ static const struct tegra_emc_table Nakasi_dvfs_Elpida_table_0430[] = {
748748
},
749749
};
750750

751-
static const struct tegra_emc_table Nakasi_dvfs_Hynix_table_0430[] ={
751+
static const struct tegra_emc_table Nakasi_dvfs_Hynix_table_0704_15R7[] = {
752752
{
753753
0x32, /* Rev 3.2 */
754754
25500, /* SDRAM frequency */
@@ -840,7 +840,7 @@ static const struct tegra_emc_table Nakasi_dvfs_Hynix_table_0430[] ={
840840
0x00000000, /* EMC_CTT */
841841
0x00000000, /* EMC_CTT_DURATION */
842842
0x80000287, /* EMC_DYN_SELF_REF_CONTROL */
843-
0x00020001, /* MC_EMEM_ARB_CFG */
843+
0x00030003, /* MC_EMEM_ARB_CFG */
844844
0xc0000010, /* MC_EMEM_ARB_OUTSTANDING_REQ */
845845
0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
846846
0x00000001, /* MC_EMEM_ARB_TIMING_RP */
@@ -960,7 +960,7 @@ static const struct tegra_emc_table Nakasi_dvfs_Hynix_table_0430[] ={
960960
0x00000000, /* EMC_CTT */
961961
0x00000000, /* EMC_CTT_DURATION */
962962
0x8000040b, /* EMC_DYN_SELF_REF_CONTROL */
963-
0x00010001, /* MC_EMEM_ARB_CFG */
963+
0x00010003, /* MC_EMEM_ARB_CFG */
964964
0xc0000010, /* MC_EMEM_ARB_OUTSTANDING_REQ */
965965
0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
966966
0x00000001, /* MC_EMEM_ARB_TIMING_RP */
@@ -1080,7 +1080,7 @@ static const struct tegra_emc_table Nakasi_dvfs_Hynix_table_0430[] ={
10801080
0x00000000, /* EMC_CTT */
10811081
0x00000000, /* EMC_CTT_DURATION */
10821082
0x80000713, /* EMC_DYN_SELF_REF_CONTROL */
1083-
0x00000001, /* MC_EMEM_ARB_CFG */
1083+
0x00000003, /* MC_EMEM_ARB_CFG */
10841084
0xc0000018, /* MC_EMEM_ARB_OUTSTANDING_REQ */
10851085
0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
10861086
0x00000001, /* MC_EMEM_ARB_TIMING_RP */
@@ -1200,7 +1200,7 @@ static const struct tegra_emc_table Nakasi_dvfs_Hynix_table_0430[] ={
12001200
0x00000000, /* EMC_CTT */
12011201
0x00000000, /* EMC_CTT_DURATION */
12021202
0x80000d22, /* EMC_DYN_SELF_REF_CONTROL */
1203-
0x00000003, /* MC_EMEM_ARB_CFG */
1203+
0x00000006, /* MC_EMEM_ARB_CFG */
12041204
0xc0000025, /* MC_EMEM_ARB_OUTSTANDING_REQ */
12051205
0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
12061206
0x00000001, /* MC_EMEM_ARB_TIMING_RP */
@@ -1320,7 +1320,7 @@ static const struct tegra_emc_table Nakasi_dvfs_Hynix_table_0430[] ={
13201320
0x00000000, /* EMC_CTT */
13211321
0x00000000, /* EMC_CTT_DURATION */
13221322
0x800014d4, /* EMC_DYN_SELF_REF_CONTROL */
1323-
0x00000005, /* MC_EMEM_ARB_CFG */
1323+
0x0000000a, /* MC_EMEM_ARB_CFG */
13241324
0xc000003d, /* MC_EMEM_ARB_OUTSTANDING_REQ */
13251325
0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
13261326
0x00000002, /* MC_EMEM_ARB_TIMING_RP */
@@ -1440,7 +1440,7 @@ static const struct tegra_emc_table Nakasi_dvfs_Hynix_table_0430[] ={
14401440
0x00000000, /* EMC_CTT */
14411441
0x00000000, /* EMC_CTT_DURATION */
14421442
0x800028a5, /* EMC_DYN_SELF_REF_CONTROL */
1443-
0x0000000a, /* MC_EMEM_ARB_CFG */
1443+
0x00000014, /* MC_EMEM_ARB_CFG */
14441444
0xc0000079, /* MC_EMEM_ARB_OUTSTANDING_REQ */
14451445
0x00000003, /* MC_EMEM_ARB_TIMING_RCD */
14461446
0x00000004, /* MC_EMEM_ARB_TIMING_RP */
@@ -1514,24 +1514,24 @@ int grouper_emc_init(void)
15141514
printk("grouper_emc_init:mem_bootstrap_ad4=%u mem_bootstrap_ad5=%u \n",mem_bootstrap_ad4,mem_bootstrap_ad5);
15151515

15161516
if(!mem_bootstrap_ad4 && !mem_bootstrap_ad5){
1517-
tegra_init_emc(Nakasi_dvfs_Elpida_table_0430,
1518-
ARRAY_SIZE(Nakasi_dvfs_Elpida_table_0430));
1519-
printk("grouper_emc_init:Nakasi_dvfs_Elpida_table_0430\n");
1517+
tegra_init_emc(Nakasi_dvfs_Elpida_table_0704_15R7,
1518+
ARRAY_SIZE(Nakasi_dvfs_Elpida_table_0704_15R7));
1519+
printk("grouper_emc_init:Nakasi_dvfs_Elpida_table_0704_15R7\n");
15201520
}else{
1521-
tegra_init_emc(Nakasi_dvfs_Hynix_table_0430,
1522-
ARRAY_SIZE(Nakasi_dvfs_Hynix_table_0430));
1523-
printk("grouper_emc_init:Nakasi_dvfs_Hynix_table_0430\n");
1521+
tegra_init_emc(Nakasi_dvfs_Hynix_table_0704_15R7,
1522+
ARRAY_SIZE(Nakasi_dvfs_Hynix_table_0704_15R7));
1523+
printk("grouper_emc_init:Nakasi_dvfs_Hynix_table_0704_15R7\n");
15241524
}
15251525

15261526
return 0;
15271527

15281528
err_handle:
1529-
if(tegra_init_emc(Nakasi_dvfs_Elpida_table_0430,
1530-
ARRAY_SIZE(Nakasi_dvfs_Elpida_table_0430))){
1531-
printk("[unknow bootstrap pin] use Nakasi_dvfs_Elpida_table_0430\n");
1532-
}else if (tegra_init_emc(Nakasi_dvfs_Hynix_table_0430,
1533-
ARRAY_SIZE(Nakasi_dvfs_Hynix_table_0430))){
1534-
printk("[unknow bootstrap pin] use Nakasi_dvfs_Hynix_table_0430 \n");
1529+
if(tegra_init_emc(Nakasi_dvfs_Elpida_table_0704_15R7,
1530+
ARRAY_SIZE(Nakasi_dvfs_Elpida_table_0704_15R7))){
1531+
printk("[unknow bootstrap pin] use Nakasi_dvfs_Elpida_table_0704_15R7\n");
1532+
}else if (tegra_init_emc(Nakasi_dvfs_Hynix_table_0704_15R7,
1533+
ARRAY_SIZE(Nakasi_dvfs_Hynix_table_0704_15R7))){
1534+
printk("[unknow bootstrap pin] use Nakasi_dvfs_Hynix_table_0704_15R7\n");
15351535
}else
15361536
printk("grouper_emc_init:no validate EMC tabe, disable EMC DVFS\n");
15371537
return 0;

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