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1 | 1 | // SPDX-License-Identifier: Apache-2.0 OR MIT |
2 | 2 | // |
3 | | -// Copyright (c) 2018-2023 by the author(s) |
| 3 | +// Copyright (c) 2018-2025 by the author(s) |
4 | 4 | // |
5 | 5 | // Author(s): |
6 | 6 | // - Andre Richter <[email protected]> |
7 | 7 | // - Berkus Decker <[email protected]> |
8 | 8 | // - Bradley Landherr <[email protected]> |
| 9 | + |
9 | 10 |
|
10 | 11 | //! Exception Syndrome Register - EL2 |
11 | 12 | //! |
@@ -36,43 +37,101 @@ register_bitfields! {u64, |
36 | 37 | /// - The cause of the exception, for example the configuration required to enable the |
37 | 38 | /// trap. |
38 | 39 | /// - The encoding of the associated ISS. |
39 | | - /// |
40 | | - /// Incomplete listing - to be done. |
41 | 40 | EC OFFSET(26) NUMBITS(6) [ |
42 | | - Unknown = 0b00_0000, |
43 | | - TrappedWFIorWFE = 0b00_0001, |
44 | | - TrappedMCRorMRC = 0b00_0011, // A32 |
45 | | - TrappedMCRRorMRRC = 0b00_0100, // A32 |
46 | | - TrappedMCRorMRC2 = 0b00_0101, // A32 |
47 | | - TrappedLDCorSTC = 0b00_0110, // A32 |
48 | | - TrappedFP = 0b00_0111, |
49 | | - TrappedMRRC = 0b00_1100, // A32 |
50 | | - BranchTarget = 0b00_1101, |
| 41 | + /// Unknown reason |
| 42 | + Unknown = 0b00_0000, |
| 43 | + /// Trapped WF* instruction execution |
| 44 | + TrappedWFIorWFE = 0b00_0001, |
| 45 | + /// Trapped MCR or MRC access with (coproc==0b1111) (FEAT_AA32) |
| 46 | + TrappedMCRorMRC = 0b00_0011, |
| 47 | + /// Trapped MCRR or MRRC access with (coproc==0b1111) (FEAT_AA32) |
| 48 | + TrappedMCRRorMRRC = 0b00_0100, |
| 49 | + /// Trapped MCR or MRC access with (coproc==0b1110) (FEAT_AA32) |
| 50 | + TrappedMCRorMRC2 = 0b00_0101, |
| 51 | + /// Trapped LDC or STC access (FEAT_AA32) |
| 52 | + TrappedLDCorSTC = 0b00_0110, |
| 53 | + /// Access to SME, SVE, Advanced SIMD or floating-point functionality trapped |
| 54 | + TrappedFP = 0b00_0111, |
| 55 | + /// Trapped VMRS access, from ID group trap (FEAT_AA32) |
| 56 | + TrappedVMRS = 0b00_1000, |
| 57 | + /// Trapped use of a Pointer authentication instruction (FEAT_PAuth) |
| 58 | + TrappedPointerAuth = 0b00_1001, |
| 59 | + /// Trapped execution of any instruction not covered by other EC values (FEAT_LS64/FEAT_SPEv1p5/FEAT_TRBEv1p1) |
| 60 | + TrappedNotCovered = 0b00_1010, |
| 61 | + /// Trapped MRRC access with (coproc==0b1110) (FEAT_AA32) |
| 62 | + TrappedMRRC = 0b00_1100, |
| 63 | + /// Branch Target Exception (FEAT_BTI) |
| 64 | + BranchTarget = 0b00_1101, |
| 65 | + /// Illegal Execution state |
51 | 66 | IllegalExecutionState = 0b00_1110, |
52 | | - SVC32 = 0b01_0001, // A32 |
53 | | - SVC64 = 0b01_0101, |
54 | | - HVC64 = 0b01_0110, |
55 | | - SMC64 = 0b01_0111, |
56 | | - TrappedMsrMrs = 0b01_1000, |
57 | | - TrappedSve = 0b01_1001, |
58 | | - PointerAuth = 0b01_1100, |
59 | | - InstrAbortLowerEL = 0b10_0000, |
60 | | - InstrAbortCurrentEL = 0b10_0001, |
61 | | - PCAlignmentFault = 0b10_0010, |
62 | | - DataAbortLowerEL = 0b10_0100, |
63 | | - DataAbortCurrentEL = 0b10_0101, |
64 | | - SPAlignmentFault = 0b10_0110, |
65 | | - TrappedFP32 = 0b10_1000, // A32 |
66 | | - TrappedFP64 = 0b10_1100, |
67 | | - SError = 0b10_1111, |
68 | | - BreakpointLowerEL = 0b11_0000, |
69 | | - BreakpointCurrentEL = 0b11_0001, |
70 | | - SoftwareStepLowerEL = 0b11_0010, |
| 67 | + /// SVC instruction execution in AArch32 state (FEAT_AA32) |
| 68 | + SVC32 = 0b01_0001, |
| 69 | + /// HVC instruction execution in AArch32 state (FEAT_AA32) |
| 70 | + HVC32 = 0b01_0010, |
| 71 | + /// SMC instruction execution in AArch32 state (FEAT_AA32) |
| 72 | + SMC32 = 0b01_0011, |
| 73 | + /// Trapped MSRR, MRRS or System instruction execution in AArch64 state (FEAT_SYSREG128/FEAT_SYSINSTR128) |
| 74 | + TrappedMSRR_MRRS = 0b01_0100, |
| 75 | + /// SVC instruction execution in AArch64 state (FEAT_AA64) |
| 76 | + SVC64 = 0b01_0101, |
| 77 | + /// HVC instruction execution in AArch64 state (FEAT_AA64) |
| 78 | + HVC64 = 0b01_0110, |
| 79 | + /// SMC instruction execution in AArch64 state (FEAT_AA64) |
| 80 | + SMC64 = 0b01_0111, |
| 81 | + /// Trapped MSR, MRS or System instruction execution in AArch64 state (FEAT_AA64) |
| 82 | + TrappedMsrMrs = 0b01_1000, |
| 83 | + /// Access to SVE functionality trapped (FEAT_SVE) |
| 84 | + TrappedSve = 0b01_1001, |
| 85 | + /// Trapped ERET, ERETAA, or ERETAB instruction execution (FEAT_FGT/FEAT_NV) |
| 86 | + TrappedERET = 0b01_1010, |
| 87 | + /// Exception from TSTART instruction (FEAT_TME) |
| 88 | + TrappedTSTART = 0b01_1011, |
| 89 | + /// Exception from a PAC Fail (FEAT_FPAC) |
| 90 | + PointerAuth = 0b01_1100, |
| 91 | + /// Access to SME functionality trapped (FEAT_SME) |
| 92 | + TrappedSME = 0b01_1101, |
| 93 | + /// Instruction Abort from a lower Exception level |
| 94 | + InstrAbortLowerEL = 0b10_0000, |
| 95 | + /// Instruction Abort taken without a change in Exception level |
| 96 | + InstrAbortCurrentEL = 0b10_0001, |
| 97 | + /// PC alignment fault exception |
| 98 | + PCAlignmentFault = 0b10_0010, |
| 99 | + /// Data Abort exception from a lower Exception level |
| 100 | + DataAbortLowerEL = 0b10_0100, |
| 101 | + /// Data Abort exception without a change in Exception level |
| 102 | + DataAbortCurrentEL = 0b10_0101, |
| 103 | + /// SP alignment fault exception |
| 104 | + SPAlignmentFault = 0b10_0110, |
| 105 | + /// Memory Operation Exception (FEAT_MOPS) |
| 106 | + MemoryOperationException = 0b10_0111, |
| 107 | + /// Trapped floating-point exception taken from AArch32 state (FEAT_AA32) |
| 108 | + TrappedFP32 = 0b10_1000, |
| 109 | + /// Trapped floating-point exception taken from AArch64 state (FEAT_AA64) |
| 110 | + TrappedFP64 = 0b10_1100, |
| 111 | + /// GCS exception (FEAT_GCS) |
| 112 | + GCSException = 0b10_1101, |
| 113 | + /// SError exception |
| 114 | + SError = 0b10_1111, |
| 115 | + /// Breakpoint exception from a lower Exception level |
| 116 | + BreakpointLowerEL = 0b11_0000, |
| 117 | + /// Breakpoint exception taken without a change in Exception level |
| 118 | + BreakpointCurrentEL = 0b11_0001, |
| 119 | + /// Software Step exception from a lower Exception level |
| 120 | + SoftwareStepLowerEL = 0b11_0010, |
| 121 | + /// Software Step exception taken without a change in Exception level |
71 | 122 | SoftwareStepCurrentEL = 0b11_0011, |
72 | | - WatchpointLowerEL = 0b11_0100, |
73 | | - WatchpointCurrentEL = 0b11_0101, |
74 | | - Bkpt32 = 0b11_1000, // A32 BKTP instruction |
75 | | - Brk64 = 0b11_1100 // A64 BRK instruction |
| 123 | + /// Watchpoint exception from a lower Exception level |
| 124 | + WatchpointLowerEL = 0b11_0100, |
| 125 | + /// Watchpoint exception taken without a change in Exception level |
| 126 | + WatchpointCurrentEL = 0b11_0101, |
| 127 | + /// BKPT instruction execution in AArch32 state (FEAT_AA32) |
| 128 | + Bkpt32 = 0b11_1000, |
| 129 | + /// Vector Catch exception from AArch32 state (FEAT_AA32) |
| 130 | + VectorCatch32 = 0b11_1010, |
| 131 | + /// BRK instruction execution in AArch64 state (FEAT_AA64) |
| 132 | + Brk64 = 0b11_1100, |
| 133 | + /// Profiling exception (FEAT_EBEP/FEAT_SPE_EXC/FEAT_TRBE_EXC) |
| 134 | + ProfilingException = 0b11_1101 |
76 | 135 | ], |
77 | 136 |
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78 | 137 | /// Instruction Length for synchronous exceptions. |
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