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jonathanpallantjonathanpallant
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Add gic-timer example.
Shows how to use the Physical Timer and the Virtual Timer interrupts.
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‎examples/mps3-an536/Cargo.toml‎

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@@ -41,3 +41,7 @@ required-features = ["gic"]
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[[bin]]
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name = "gic-unified-irq"
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required-features = ["gic"]
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[[bin]]
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name = "gic-timer"
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required-features = ["gic"]

‎examples/mps3-an536/reference/gic-timer-armv8r-none-eabihf.out‎

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Found PERIPHBASE 0xf0000000
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Creating GIC driver @ 0xf0000000 / 0xf0100000
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Calling git.setup(0)
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Configure Physical Timer Interrupt...
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Configure Virtual Timer Interrupt...
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Physical timer frequency 62500000 Hz, interrupt every 3125000
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Virtual timer frequency 62500000 Hz, interrupt every 3125000
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Enabling interrupts...
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CPSR: CPSR { N=0 Z=1 C=1 V=0 Q=0 J=0 E=0 A=0 I=1 F=1 T=0 MODE=Ok(Sys) }
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CPSR: CPSR { N=0 Z=1 C=1 V=0 Q=0 J=0 E=0 A=0 I=0 F=1 T=0 MODE=Ok(Sys) }
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> IRQ
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- IRQ handle PPI 14
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- Physical Timer handled
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- IRQ handle PPI 11
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- Virtual Timer handled
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< IRQ
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Main loop wake up 1
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> IRQ
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- IRQ handle PPI 14
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- Physical Timer handled
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- IRQ handle PPI 11
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- Virtual Timer handled
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< IRQ
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Main loop wake up 2
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> IRQ
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- IRQ handle PPI 14
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- Physical Timer handled
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- IRQ handle PPI 11
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- Virtual Timer handled
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< IRQ
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Main loop wake up 3
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> IRQ
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- IRQ handle PPI 14
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- Physical Timer handled
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- IRQ handle PPI 11
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- Virtual Timer handled
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< IRQ
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Main loop wake up 4
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> IRQ
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- IRQ handle PPI 14
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- Physical Timer handled
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- IRQ handle PPI 11
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- Virtual Timer handled
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< IRQ
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Main loop wake up 5
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> IRQ
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- IRQ handle PPI 14
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- Physical Timer handled
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- IRQ handle PPI 11
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- Virtual Timer handled
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< IRQ
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Main loop wake up 6
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> IRQ
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- IRQ handle PPI 14
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- Physical Timer handled
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- IRQ handle PPI 11
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- Virtual Timer handled
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< IRQ
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Main loop wake up 7
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> IRQ
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- IRQ handle PPI 14
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- Physical Timer handled
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- IRQ handle PPI 11
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- Virtual Timer handled
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< IRQ
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Main loop wake up 8
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> IRQ
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- IRQ handle PPI 14
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- Physical Timer handled
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- IRQ handle PPI 11
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- Virtual Timer handled
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< IRQ
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Main loop wake up 9
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> IRQ
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- IRQ handle PPI 14
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- Physical Timer handled
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- IRQ handle PPI 11
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- Virtual Timer handled
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< IRQ
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Main loop wake up 10

‎examples/mps3-an536/src/bin/gic-timer.rs‎

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//! GICv3 + Generic Timer example
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#![no_std]
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#![no_main]
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use core::ptr::NonNull;
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// pull in our start-up code
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use cortex_r_rt::{entry, irq};
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// pull in our library
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use mps3_an536 as _;
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use arm_gic::{
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gicv3::{GicCpuInterface, GicV3, Group, InterruptGroup},
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IntId, UniqueMmioPointer,
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};
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use cortex_ar::generic_timer::{El1PhysicalTimer, El1VirtualTimer, GenericTimer};
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use semihosting::println;
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/// Offset from PERIPHBASE for GIC Distributor
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const GICD_BASE_OFFSET: usize = 0x0000_0000usize;
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/// Offset from PERIPHBASE for the first GIC Redistributor
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const GICR_BASE_OFFSET: usize = 0x0010_0000usize;
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/// The PPI for the physical timer, according to the Cortex-R52 Reference Manual
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///
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/// This corresponds to Interrupt ID 30.
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const PHYSICAL_TIMER_PPI: IntId = IntId::ppi(14);
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/// The PPI for the virutal timer, according to the Cortex-R52 Reference Manual
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///
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/// This corresponds to Interrupt ID 27.
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const VIRTUAL_TIMER_PPI: IntId = IntId::ppi(11);
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/// How many tick interrupts per second
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const TICKS_PER_SECOND: u32 = 20;
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/// The entry-point to the Rust application.
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///
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/// It is called by the start-up code in `cortex-r-rt`.
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#[entry]
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fn main() -> ! {
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// Get the GIC address by reading CBAR
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let periphbase = cortex_ar::register::ImpCbar::read().periphbase();
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println!("Found PERIPHBASE {:010p}", periphbase);
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let gicd_base = periphbase.wrapping_byte_add(GICD_BASE_OFFSET);
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let gicr_base = periphbase.wrapping_byte_add(GICR_BASE_OFFSET);
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// Initialise the GIC.
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println!(
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"Creating GIC driver @ {:010p} / {:010p}",
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gicd_base, gicr_base
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);
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let gicd = unsafe { UniqueMmioPointer::new(NonNull::new(gicd_base.cast()).unwrap()) };
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let gicr_base = NonNull::new(gicr_base.cast()).unwrap();
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let mut gic: GicV3 = unsafe { GicV3::new(gicd, gicr_base, 1, false) };
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println!("Calling git.setup(0)");
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gic.setup(0);
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GicCpuInterface::set_priority_mask(0x80);
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println!("Configure Physical Timer Interrupt...");
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gic.set_interrupt_priority(PHYSICAL_TIMER_PPI, Some(0), 0x30)
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.expect("Timer set_interrupt_priority");
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gic.set_group(PHYSICAL_TIMER_PPI, Some(0), Group::Group1NS)
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.expect("Timer set_group");
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gic.enable_interrupt(PHYSICAL_TIMER_PPI, Some(0), true)
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.expect("Timer enable_interrupt");
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println!("Configure Virtual Timer Interrupt...");
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gic.set_interrupt_priority(VIRTUAL_TIMER_PPI, Some(0), 0x31)
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.expect("Timer set_interrupt_priority");
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gic.set_group(VIRTUAL_TIMER_PPI, Some(0), Group::Group1NS)
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.expect("Timer set_group");
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gic.enable_interrupt(VIRTUAL_TIMER_PPI, Some(0), true)
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.expect("Timer enable_interrupt");
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let mut pgt = unsafe { El1PhysicalTimer::new() };
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pgt.enable(true);
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pgt.interrupt_mask(false);
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pgt.counter_compare_set(u64::MAX);
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println!(
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"Physical timer frequency {} Hz, interrupt every {}",
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pgt.frequency_hz(),
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pgt.frequency_hz() / TICKS_PER_SECOND
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);
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pgt.countdown_set(pgt.frequency_hz() / TICKS_PER_SECOND);
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let mut vgt = unsafe { El1VirtualTimer::new() };
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vgt.enable(true);
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vgt.interrupt_mask(false);
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vgt.counter_compare_set(u64::MAX);
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println!(
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"Virtual timer frequency {} Hz, interrupt every {}",
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vgt.frequency_hz(),
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vgt.frequency_hz() / TICKS_PER_SECOND
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);
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vgt.countdown_set(vgt.frequency_hz() / TICKS_PER_SECOND);
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println!("Enabling interrupts...");
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dump_cpsr();
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unsafe {
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cortex_ar::interrupt::enable();
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}
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dump_cpsr();
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for count in 1..=10 {
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cortex_ar::asm::wfi();
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println!("Main loop wake up {}", count);
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}
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semihosting::process::exit(0);
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}
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fn dump_cpsr() {
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let cpsr = cortex_ar::register::Cpsr::read();
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println!("CPSR: {:?}", cpsr);
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}
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/// Called when the Arm core gets an IRQ
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#[irq]
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fn irq_handler() {
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println!("> IRQ");
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while let Some(int_id) = GicCpuInterface::get_and_acknowledge_interrupt(InterruptGroup::Group1)
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{
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println!("- IRQ handle {:?}", int_id);
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if int_id == PHYSICAL_TIMER_PPI {
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handle_physical_timer_irq();
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} else if int_id == VIRTUAL_TIMER_PPI {
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handle_virtual_timer_irq();
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}
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GicCpuInterface::end_interrupt(int_id, InterruptGroup::Group1);
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}
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println!("< IRQ");
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}
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/// Run when the virtual timer IRQ fires
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fn handle_virtual_timer_irq() {
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// SAFETY: No other code writes to this peripheral, so this won't race
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let mut vgt = unsafe { El1VirtualTimer::new() };
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if vgt.interrupt_status() {
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println!("- Virtual Timer handled");
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let delta = vgt.frequency_hz() / TICKS_PER_SECOND;
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vgt.countdown_set(vgt.countdown().wrapping_add(delta));
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}
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}
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/// Run when the physical timer IRQ fires
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fn handle_physical_timer_irq() {
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// SAFETY: No other code writes to this peripheral, so this won't race
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let mut pgt = unsafe { El1PhysicalTimer::new() };
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if pgt.interrupt_status() {
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println!("- Physical Timer handled");
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let delta = pgt.frequency_hz() / TICKS_PER_SECOND;
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pgt.countdown_set(pgt.countdown().wrapping_add(delta));
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}
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}

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