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Functional SSDT and Config.plist (#20)
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‎HD630.plist

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‎v14/ACPIs/GE62 QD/SSDT-DDGPU.dsl

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/*
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* Intel ACPI Component Architecture
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* AML/ASL+ Disassembler version 20180427 (64-bit version)(RM)
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* Copyright (c) 2000 - 2018 Intel Corporation
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*
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* Disassembling to non-symbolic legacy ASL operators
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*
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* Disassembly of SSDT-DDGPU.aml, Mon Apr 8 22:10:13 2019
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*
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* Original Table Header:
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* Signature "SSDT"
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* Length 0x000000E0 (224)
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* Revision 0x02
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* Checksum 0xB2
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* OEM ID "hack"
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* OEM Table ID "_DDGPU"
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* OEM Revision 0x00000000 (0)
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* Compiler ID "INTL"
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* Compiler Version 0x20180427 (538444839)
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*/
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DefinitionBlock ("", "SSDT", 2, "hack", "_DDGPU", 0x00000000)
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{
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External (_SB_.PCI0.PEG0.PEGP._OFF, MethodObj) // 0 Arguments (from opcode)
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External (_SB_.PCI0.PEGP.DGFX._OFF, MethodObj) // 0 Arguments (from opcode)
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Device (RMD1)
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{
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Name (_HID, "RMD10000") // _HID: Hardware ID
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Method (_INI, 0, NotSerialized) // _INI: Initialize
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{
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If (CondRefOf (\_SB.PCI0.PEG0.PEGP._OFF))
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{
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\_SB.PCI0.PEG0.PEGP._OFF ()
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}
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If (CondRefOf (\_SB.PCI0.PEGP.DGFX._OFF))
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{
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\_SB.PCI0.PEGP.DGFX._OFF ()
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}
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}
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}
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}
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‎v14/ACPIs/GE62 QD/SSDT-IMEI.dsl

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/*
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* Intel ACPI Component Architecture
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* AML/ASL+ Disassembler version 20180427 (64-bit version)(RM)
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* Copyright (c) 2000 - 2018 Intel Corporation
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*
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* Disassembling to non-symbolic legacy ASL operators
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*
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* Disassembly of SSDT-IMEI.aml, Mon Apr 8 22:10:13 2019
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*
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* Original Table Header:
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* Signature "SSDT"
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* Length 0x00000138 (312)
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* Revision 0x02
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* Checksum 0x6E
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* OEM ID "hack"
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* OEM Table ID "_IMEI"
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* OEM Revision 0x00000000 (0)
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* Compiler ID "INTL"
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* Compiler Version 0x20180427 (538444839)
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*/
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DefinitionBlock ("", "SSDT", 2, "hack", "_IMEI", 0x00000000)
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{
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External (_SB_.PCI0.IGPU, DeviceObj) // (from opcode)
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Scope (_SB.PCI0.IGPU)
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{
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OperationRegion (RMP2, PCI_Config, 0x02, 0x02)
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}
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Device (_SB.PCI0.IMEI)
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{
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Name (_ADR, 0x00160000) // _ADR: Address
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}
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Scope (_SB.PCI0.IMEI)
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{
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OperationRegion (RMP1, PCI_Config, 0x02, 0x02)
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Field (RMP1, AnyAcc, NoLock, Preserve)
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{
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MDID, 16
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}
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Field (^IGPU.RMP2, AnyAcc, NoLock, Preserve)
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{
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GDID, 16
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}
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Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
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{
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If (LNot (Arg2))
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{
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Return (Buffer (One)
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{
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0x03
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})
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}
57+
58+
Store (^GDID, Local1)
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Store (^MDID, Local2)
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If (LAnd (LEqual (0x1C3A, Local2), LNotEqual (Ones, Match (Package (0x02)
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{
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0x0166,
63+
0x0162
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}, MEQ, Local1, MTR, Zero, Zero))))
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{
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Return (Package (0x02)
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{
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"device-id",
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Buffer (0x04)
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{
71+
0x3A, 0x1E, 0x00, 0x00
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}
73+
})
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}
75+
ElseIf (LAnd (LEqual (0x1E3A, Local2), LNotEqual (Ones, Match (Package (0x04)
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{
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0x0116,
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0x0126,
79+
0x0112,
80+
0x0122
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}, MEQ, Local1, MTR, Zero, Zero))))
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{
83+
Return (Package (0x02)
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{
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"device-id",
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Buffer (0x04)
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{
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0x3A, 0x1C, 0x00, 0x00
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}
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})
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}
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Return (Package (0x00){})
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}
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}
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}
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‎v14/ACPIs/GE62 QD/SSDT-PNLF.dsl

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/*
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* Intel ACPI Component Architecture
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* AML/ASL+ Disassembler version 20180427 (64-bit version)(RM)
4+
* Copyright (c) 2000 - 2018 Intel Corporation
5+
*
6+
* Disassembling to non-symbolic legacy ASL operators
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*
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* Disassembly of SSDT-PNLF.aml, Mon Apr 8 22:10:13 2019
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*
10+
* Original Table Header:
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* Signature "SSDT"
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* Length 0x000003D2 (978)
13+
* Revision 0x02
14+
* Checksum 0x4D
15+
* OEM ID "hack"
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* OEM Table ID "_PNLF"
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* OEM Revision 0x00000000 (0)
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* Compiler ID "INTL"
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* Compiler Version 0x20180427 (538444839)
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*/
21+
DefinitionBlock ("", "SSDT", 2, "hack", "_PNLF", 0x00000000)
22+
{
23+
External (_SB_.PCI0.IGPU, DeviceObj) // (from opcode)
24+
External (RMCF.BKLT, IntObj) // (from opcode)
25+
External (RMCF.FBTP, IntObj) // (from opcode)
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External (RMCF.GRAN, IntObj) // (from opcode)
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External (RMCF.LEVW, IntObj) // (from opcode)
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External (RMCF.LMAX, IntObj) // (from opcode)
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Scope (_SB.PCI0.IGPU)
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{
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OperationRegion (RMP3, PCI_Config, Zero, 0x14)
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}
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Device (_SB.PCI0.IGPU.PNLF)
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{
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Name (_ADR, Zero) // _ADR: Address
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Name (_HID, EisaId ("APP0002")) // _HID: Hardware ID
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Name (_CID, "backlight") // _CID: Compatible ID
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Name (_UID, Zero) // _UID: Unique ID
41+
Name (_STA, 0x0B) // _STA: Status
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Field (^RMP3, AnyAcc, NoLock, Preserve)
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{
44+
Offset (0x02),
45+
GDID, 16,
46+
Offset (0x10),
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BAR1, 32
48+
}
49+
50+
OperationRegion (RMB1, SystemMemory, And (BAR1, 0xFFFFFFFFFFFFFFF0), 0x000E1184)
51+
Field (RMB1, AnyAcc, Lock, Preserve)
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{
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Offset (0x48250),
54+
LEV2, 32,
55+
LEVL, 32,
56+
Offset (0x70040),
57+
P0BL, 32,
58+
Offset (0xC2000),
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GRAN, 32,
60+
Offset (0xC8250),
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LEVW, 32,
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LEVX, 32,
63+
Offset (0xE1180),
64+
PCHL, 32
65+
}
66+
67+
Method (_INI, 0, NotSerialized) // _INI: Initialize
68+
{
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Store (One, Local4)
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If (CondRefOf (\RMCF.BKLT))
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{
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Store (\RMCF.BKLT, Local4)
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}
74+
75+
If (LEqual (Zero, And (One, Local4)))
76+
{
77+
Return (Zero)
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}
79+
80+
Store (^GDID, Local0)
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Store (Ones, Local2)
82+
If (CondRefOf (\RMCF.LMAX))
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{
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Store (\RMCF.LMAX, Local2)
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}
86+
87+
Store (Zero, Local3)
88+
If (CondRefOf (\RMCF.FBTP))
89+
{
90+
Store (\RMCF.FBTP, Local3)
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}
92+
93+
If (LEqual (Zero, Local3))
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{
95+
If (LNotEqual (Ones, Match (Package (0x10)
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{
97+
0x010B,
98+
0x0102,
99+
0x0106,
100+
0x1106,
101+
0x1601,
102+
0x0116,
103+
0x0126,
104+
0x0112,
105+
0x0122,
106+
0x0152,
107+
0x0156,
108+
0x0162,
109+
0x0166,
110+
0x016A,
111+
0x46,
112+
0x42
113+
}, MEQ, Local0, MTR, Zero, Zero)))
114+
{
115+
Store (One, Local3)
116+
}
117+
Else
118+
{
119+
Store (0x02, Local3)
120+
}
121+
}
122+
123+
If (LEqual (One, Local3))
124+
{
125+
If (LEqual (Ones, Local2))
126+
{
127+
Store (0x0710, Local2)
128+
}
129+
130+
ShiftRight (^LEVX, 0x10, Local1)
131+
If (LNot (Local1))
132+
{
133+
Store (Local2, Local1)
134+
}
135+
136+
If (LNotEqual (Local2, Local1))
137+
{
138+
Divide (Multiply (^LEVL, Local2), Local1, , Local0)
139+
ShiftLeft (Local2, 0x10, Local3)
140+
If (LGreater (Local2, Local1))
141+
{
142+
Store (Local3, ^LEVX)
143+
Store (Local0, ^LEVL)
144+
}
145+
Else
146+
{
147+
Store (Local0, ^LEVL)
148+
Store (Local3, ^LEVX)
149+
}
150+
}
151+
}
152+
ElseIf (LEqual (0x02, Local3))
153+
{
154+
If (LEqual (Ones, Local2))
155+
{
156+
If (LNotEqual (Ones, Match (Package (0x16)
157+
{
158+
0x0D26,
159+
0x0A26,
160+
0x0D22,
161+
0x0412,
162+
0x0416,
163+
0x0A16,
164+
0x0A1E,
165+
0x0A1E,
166+
0x0A2E,
167+
0x041E,
168+
0x041A,
169+
0x0BD1,
170+
0x0BD2,
171+
0x0BD3,
172+
0x1606,
173+
0x160E,
174+
0x1616,
175+
0x161E,
176+
0x1626,
177+
0x1622,
178+
0x1612,
179+
0x162B
180+
}, MEQ, Local0, MTR, Zero, Zero)))
181+
{
182+
Store (0x0AD9, Local2)
183+
}
184+
Else
185+
{
186+
Store (0x056C, Local2)
187+
}
188+
}
189+
190+
If (LEqual (Zero, And (0x02, Local4)))
191+
{
192+
Store (0xC0000000, Local5)
193+
If (CondRefOf (\RMCF.LEVW))
194+
{
195+
If (LNotEqual (Ones, \RMCF.LEVW))
196+
{
197+
Store (\RMCF.LEVW, Local5)
198+
}
199+
}
200+
201+
Store (Local5, ^LEVW)
202+
}
203+
204+
If (And (0x04, Local4))
205+
{
206+
If (CondRefOf (\RMCF.GRAN))
207+
{
208+
Store (\RMCF.GRAN, ^GRAN)
209+
}
210+
Else
211+
{
212+
Store (Zero, ^GRAN)
213+
}
214+
}
215+
216+
ShiftRight (^LEVX, 0x10, Local1)
217+
If (LNot (Local1))
218+
{
219+
Store (Local2, Local1)
220+
}
221+
222+
If (LNotEqual (Local2, Local1))
223+
{
224+
Or (Divide (Multiply (And (^LEVX, 0xFFFF), Local2), Local1, ), ShiftLeft (Local2, 0x10), Local0)
225+
Store (Local0, ^LEVX)
226+
}
227+
}
228+
229+
If (LEqual (Local2, 0x0710))
230+
{
231+
Store (0x0E, _UID)
232+
}
233+
ElseIf (LEqual (Local2, 0x0AD9))
234+
{
235+
Store (0x0F, _UID)
236+
}
237+
ElseIf (LEqual (Local2, 0x056C))
238+
{
239+
Store (0x10, _UID)
240+
}
241+
ElseIf (LEqual (Local2, 0x07A1))
242+
{
243+
Store (0x11, _UID)
244+
}
245+
ElseIf (LEqual (Local2, 0x1499))
246+
{
247+
Store (0x12, _UID)
248+
}
249+
Else
250+
{
251+
Store (0x63, _UID)
252+
}
253+
}
254+
}
255+
}
256+

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