Skip to content

Commit 5e35d26

Browse files
authored
Add MIPS cpuinfo support (prometheus#306)
Add CPUInfo parsing for MIPS. prometheus/node_exporter#1735 Signed-off-by: Ben Kochie <[email protected]>
1 parent 3ead7e8 commit 5e35d26

File tree

3 files changed

+114
-0
lines changed

3 files changed

+114
-0
lines changed

cpuinfo.go

Lines changed: 43 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -319,6 +319,49 @@ func parseCPUInfoS390X(info []byte) ([]CPUInfo, error) {
319319
return cpuinfo, nil
320320
}
321321

322+
func parseCPUInfoMips(info []byte) ([]CPUInfo, error) {
323+
scanner := bufio.NewScanner(bytes.NewReader(info))
324+
325+
// find the first "processor" line
326+
firstLine := firstNonEmptyLine(scanner)
327+
if !strings.HasPrefix(firstLine, "system type") || !strings.Contains(firstLine, ":") {
328+
return nil, errors.New("invalid cpuinfo file: " + firstLine)
329+
}
330+
field := strings.SplitN(firstLine, ": ", 2)
331+
cpuinfo := []CPUInfo{}
332+
systemType := field[1]
333+
334+
i := 0
335+
336+
for scanner.Scan() {
337+
line := scanner.Text()
338+
if !strings.Contains(line, ":") {
339+
continue
340+
}
341+
field := strings.SplitN(line, ": ", 2)
342+
switch strings.TrimSpace(field[0]) {
343+
case "processor":
344+
v, err := strconv.ParseUint(field[1], 0, 32)
345+
if err != nil {
346+
return nil, err
347+
}
348+
i = int(v)
349+
cpuinfo = append(cpuinfo, CPUInfo{}) // start of the next processor
350+
cpuinfo[i].Processor = uint(v)
351+
cpuinfo[i].VendorID = systemType
352+
case "cpu model":
353+
cpuinfo[i].ModelName = field[1]
354+
case "BogoMIPS":
355+
v, err := strconv.ParseFloat(field[1], 64)
356+
if err != nil {
357+
return nil, err
358+
}
359+
cpuinfo[i].BogoMips = v
360+
}
361+
}
362+
return cpuinfo, nil
363+
}
364+
322365
func parseCPUInfoPPC(info []byte) ([]CPUInfo, error) {
323366
scanner := bufio.NewScanner(bytes.NewReader(info))
324367

cpuinfo_mips.go

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
// Copyright 2020 The Prometheus Authors
2+
// Licensed under the Apache License, Version 2.0 (the "License");
3+
// you may not use this file except in compliance with the License.
4+
// You may obtain a copy of the License at
5+
//
6+
// http://www.apache.org/licenses/LICENSE-2.0
7+
//
8+
// Unless required by applicable law or agreed to in writing, software
9+
// distributed under the License is distributed on an "AS IS" BASIS,
10+
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
11+
// See the License for the specific language governing permissions and
12+
// limitations under the License.
13+
14+
// +build linux
15+
16+
package procfs
17+
18+
var parseCPUInfo = parseCPUInfoMips

cpuinfo_test.go

Lines changed: 53 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -129,6 +129,43 @@ cpu MHz static : 5000
129129
cpu number : 3
130130
cpu MHz dynamic : 5000
131131
cpu MHz static : 5000
132+
`
133+
134+
cpuinfoMips = `
135+
system type : UBNT_E100
136+
machine : Unknown
137+
processor : 0
138+
cpu model : Cavium Octeon+ V0.1
139+
BogoMIPS : 1000.00
140+
wait instruction : yes
141+
microsecond timers : yes
142+
tlb_entries : 64
143+
extra interrupt vector : yes
144+
hardware watchpoint : yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
145+
isa : mips1 mips2 mips3 mips4 mips5 mips64r2
146+
ASEs implemented :
147+
shadow register sets : 1
148+
kscratch registers : 0
149+
core : 0
150+
VCED exceptions : not available
151+
VCEI exceptions : not available
152+
153+
processor : 1
154+
cpu model : Cavium Octeon+ V0.1
155+
BogoMIPS : 1000.00
156+
wait instruction : yes
157+
microsecond timers : yes
158+
tlb_entries : 64
159+
extra interrupt vector : yes
160+
hardware watchpoint : yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
161+
isa : mips1 mips2 mips3 mips4 mips5 mips64r2
162+
ASEs implemented :
163+
shadow register sets : 1
164+
kscratch registers : 0
165+
core : 1
166+
VCED exceptions : not available
167+
VCEI exceptions : not available
168+
132169
`
133170

134171
cpuinfoPpc64 = `
@@ -279,6 +316,22 @@ func TestCPUInfoParseS390X(t *testing.T) {
279316
}
280317
}
281318

319+
func TestCPUInfoParseMips(t *testing.T) {
320+
cpuinfo, err := parseCPUInfoMips([]byte(cpuinfoMips))
321+
if err != nil || cpuinfo == nil {
322+
t.Fatalf("unable to parse mips cpu info: %v", err)
323+
}
324+
if want, have := 2, len(cpuinfo); want != have {
325+
t.Errorf("want number of processors %v, have %v", want, have)
326+
}
327+
if want, have := 1000.00, cpuinfo[0].BogoMips; want != have {
328+
t.Errorf("want BogoMIPS %v, have %v", want, have)
329+
}
330+
if want, have := "Cavium Octeon+ V0.1", cpuinfo[1].ModelName; want != have {
331+
t.Errorf("want ModelName '%v', have '%v'", want, have)
332+
}
333+
}
334+
282335
func TestCPUInfoParsePPC(t *testing.T) {
283336
cpuinfo, err := parseCPUInfoPPC([]byte(cpuinfoPpc64))
284337
if err != nil || cpuinfo == nil {

0 commit comments

Comments
 (0)