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p12ticp12tic
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Merge pull request #185 from p12tic/optimizations
Miscellaneous optimizations
2 parents ebac1a1 + f3cb489 commit 6826110

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5 files changed

+118
-7
lines changed

5 files changed

+118
-7
lines changed

‎simdpp/core/extract_bits.h‎

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -62,6 +62,17 @@ SIMDPP_INL uint8_t extract_bits_any(const any_vec32<8, V>& a)
6262
{
6363
return detail::insn::i_extract_bits_any(uint32<8>(a));
6464
}
65+
template<class V>
66+
SIMDPP_INL uint8_t extract_bits_any(const any_vec64<2, V>& a)
67+
{
68+
return detail::insn::i_extract_bits_any(uint64<2>(a));
69+
}
70+
template<class V>
71+
SIMDPP_INL uint8_t extract_bits_any(const any_vec64<4, V>& a)
72+
{
73+
return detail::insn::i_extract_bits_any(uint64<4>(a));
74+
}
75+
6576

6677
/** Extracts specific bit from each byte of each element of a int8x16 vector.
6778

‎simdpp/detail/insn/extract.h‎

Lines changed: 18 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -350,7 +350,16 @@ float i_extract(const float32<4>& a)
350350
#if SIMDPP_USE_NULL || SIMDPP_USE_NEON_NO_FLT_SP
351351
return a.el(id);
352352
#elif SIMDPP_USE_SSE2
353-
return _mm_cvtss_f32(_mm_shuffle_ps(a.native(), a.native(), _MM_SHUFFLE(id, id, id, id)));
353+
switch (id) {
354+
case 0: return _mm_cvtss_f32(a.native());
355+
#if SIMDPP_USE_SSE3
356+
case 1: return _mm_cvtss_f32(_mm_movehdup_ps(a.native()));
357+
#else
358+
case 1: return _mm_cvtss_f32(_mm_shuffle_ps(a.native(), a.native(), _MM_SHUFFLE(id, id, id, id)));
359+
#endif
360+
case 2: return _mm_cvtss_f32(_mm_unpackhi_ps(a.native(), a.native()));
361+
case 3: return _mm_cvtss_f32(_mm_shuffle_ps(a.native(), a.native(), _MM_SHUFFLE(id, id, id, id)));
362+
}
354363
#elif SIMDPP_USE_NEON
355364
return vgetq_lane_f32(a.native(), id);
356365
#elif SIMDPP_USE_ALTIVEC || SIMDPP_USE_MSA
@@ -385,7 +394,10 @@ double i_extract(const float64<2>& a)
385394
#if SIMDPP_USE_NULL
386395
return a.el(id);
387396
#elif SIMDPP_USE_SSE2
388-
return _mm_cvtsd_f64(_mm_shuffle_pd(a.native(), a.native(), SIMDPP_SHUFFLE_MASK_2x2(id, id)));
397+
if (id == 0) {
398+
return _mm_cvtsd_f64(a.native());
399+
}
400+
return _mm_cvtsd_f64(_mm_unpackhi_pd(a.native(), a.native()));
389401
#elif SIMDPP_USE_NEON32 || SIMDPP_USE_ALTIVEC || SIMDPP_USE_MSA
390402
detail::mem_block<float64x2> ax(a);
391403
return ax[id];
@@ -399,11 +411,12 @@ template<unsigned id> SIMDPP_INL
399411
double i_extract(const float64<4>& a)
400412
{
401413
#if SIMDPP_USE_AVX2
402-
return _mm256_cvtsd_f64(_mm256_permute4x64_pd(a.native(), _MM_SHUFFLE(id, id, id, id)));
403-
#else
414+
if (id == 3) {
415+
return _mm256_cvtsd_f64(_mm256_permute4x64_pd(a.native(), _MM_SHUFFLE(id, id, id, id)));
416+
}
417+
#endif
404418
float64<2> val = _mm256_extractf128_pd(a.native(), id / 2);
405419
return i_extract<id % 2>(val);
406-
#endif
407420
}
408421
#endif
409422

‎simdpp/detail/insn/extract_bits.h‎

Lines changed: 53 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -206,6 +206,59 @@ SIMDPP_INL uint8_t i_extract_bits_any(const uint32<8>& ca)
206206
#endif
207207
}
208208

209+
SIMDPP_INL uint8_t i_extract_bits_any(const uint64<2>& ca)
210+
{
211+
uint64<2> a = ca;
212+
#if SIMDPP_USE_NULL
213+
uint8_t r = 0;
214+
for (unsigned i = 0; i < a.length; i++) {
215+
uint8_t x = ca.el(i);
216+
x = x & 1;
217+
r = (r >> 1) | (x << 1);
218+
}
219+
return r;
220+
#elif SIMDPP_USE_SSE2
221+
return _mm_movemask_pd(_mm_castsi128_pd(a.native()));
222+
#elif SIMDPP_USE_NEON
223+
uint64<2> mask = make_uint(0x1, 0x2);
224+
a = bit_and(a, mask);
225+
uint64x1_t r = vadd_u64(vget_low_u64(r2), vget_high_u64(r2));
226+
return vget_lane_u8(vreinterpret_u8_u64(r), 0);
227+
#elif SIMDPP_USE_ALTIVEC
228+
uint32<4> mask = make_uint(0x1, 0x0, 0x2, 0x0);
229+
a = bit_and(a, mask);
230+
uint32<4> zero = make_zero();
231+
uint32<4> s = (int32x4)vec_sums((__vector int32_t)a.native(),
232+
(__vector int32_t)zero.native());
233+
#if SIMDPP_BIG_ENDIAN
234+
return extract<7>(uint16x8(s));
235+
#else
236+
return extract<6>(uint16x8(s));
237+
#endif
238+
#elif SIMDPP_USE_MSA
239+
uint32<4> mask = make_uint(0x1, 0x0, 0x2, 0x0);
240+
a = bit_and(a, mask);
241+
a = (v4u32) __msa_hadd_u_d(a.native(), a.native());
242+
a = bit_or(a, move4_l<2>(a));
243+
return extract<0>(a);
244+
#endif
245+
}
246+
247+
SIMDPP_INL uint8_t i_extract_bits_any(const uint64<4>& ca)
248+
{
249+
#if SIMDPP_USE_AVX512DQ
250+
return _mm256_movepi64_mask(ca.native());
251+
#elif SIMDPP_USE_AVX2
252+
return _mm256_movemask_pd(_mm256_castsi256_pd(ca.native()));
253+
#else
254+
// FIXME: can be improved
255+
uint64<2> lo, hi;
256+
lo = ca.vec<0>();
257+
hi = ca.vec<1>();
258+
return i_extract_bits_any(lo) | (i_extract_bits_any(hi) << 2);
259+
#endif
260+
}
261+
209262
template<unsigned id> SIMDPP_INL
210263
uint16_t i_extract_bits(const uint8<16>& ca)
211264
{

‎simdpp/detail/insn/zip_lo.h‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -226,8 +226,7 @@ static SIMDPP_INL
226226
float64x2 i_zip2_lo(const float64x2& a, const float64x2& b)
227227
{
228228
#if SIMDPP_USE_SSE2
229-
return _mm_castps_pd(_mm_movelh_ps(_mm_castpd_ps(a.native()),
230-
_mm_castpd_ps(b.native())));
229+
return _mm_unpacklo_pd(a.native(), b.native());
231230
#elif SIMDPP_USE_NEON64
232231
return vtrn1q_f64(a.native(), b.native());
233232
#elif SIMDPP_USE_VSX_206

‎test/insn/bitwise.cc‎

Lines changed: 35 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -106,6 +106,39 @@ void test_extract_bits32_n(TestResultsSet& tc)
106106
TEST_PUSH_ALL_COMB_OP1_T(tc, std::uint32_t, uint32<B/4>, extract_bits_any, s);
107107
}
108108

109+
template<unsigned B>
110+
void test_extract_bits64_n(TestResultsSet& tc)
111+
{
112+
using namespace simdpp;
113+
114+
TestData<uint64<B/8>> s;
115+
116+
s.add(make_uint(0x0000000000000000, 0x0000000000000000));
117+
s.add(make_uint(0xffffffffffffffff, 0x0000000000000000));
118+
s.add(make_uint(0x0000000000000000, 0xffffffffffffffff));
119+
s.add(make_uint(0xffffffffffffffff, 0xffffffffffffffff));
120+
121+
TEST_PUSH_ALL_COMB_OP1_T(tc, std::uint32_t, uint64<B/8>, extract_bits_any, s);
122+
}
123+
124+
template<unsigned B>
125+
void test_extract_bits64_n2(TestResultsSet& tc)
126+
{
127+
using namespace simdpp;
128+
129+
TestData<uint64<B/8>> s;
130+
131+
s.add(make_uint(0xffffffffffffffff, 0x0000000000000000, 0xffffffffffffffff, 0x0000000000000000));
132+
s.add(make_uint(0x0000000000000000, 0xffffffffffffffff, 0x0000000000000000, 0xffffffffffffffff));
133+
s.add(make_uint(0x0000000000000000, 0x0000000000000000, 0xffffffffffffffff, 0x0000000000000000));
134+
s.add(make_uint(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0xffffffffffffffff));
135+
s.add(make_uint(0x0000000000000000, 0xffffffffffffffff, 0xffffffffffffffff, 0xffffffffffffffff));
136+
s.add(make_uint(0xffffffffffffffff, 0xffffffffffffffff, 0xffffffffffffffff, 0xffffffffffffffff));
137+
s.add(make_uint(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000));
138+
139+
TEST_PUSH_ALL_COMB_OP1_T(tc, std::uint32_t, uint64<B/8>, extract_bits_any, s);
140+
}
141+
109142
template<class V, class V32I>
110143
void test_popcnt_type(TestResultsSet& tc)
111144
{
@@ -231,6 +264,8 @@ void test_bitwise(TestResults& res, TestReporter& tr)
231264
test_extract_bits16_n<32>(tc);
232265
test_extract_bits32_n<16>(tc);
233266
test_extract_bits32_n<32>(tc);
267+
test_extract_bits64_n<16>(tc);
268+
test_extract_bits64_n2<32>(tc);
234269
}
235270

236271
} // namespace SIMDPP_ARCH_NAMESPACE

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