Merge pull request #951 from silabs-halfdan/parameterize_zicntr

Parameterize Zicntr and Xif features

Author: Silabs-ArjanB

rtl/cv32e40x_cs_registers.sv

@@ -131,6 +131,9 @@ module cv32e40x_cs_registers import cv32e40x_pkg::*;
     (32'(1)               << 23) | // X - Non-standard extensions present
     (32'(MXL)             << 30);  // M-XLEN
 
+  localparam bit          ZIHPM  = 1'b1;
+  localparam bit          ZICNTR = 1'b1;
+
   localparam logic [31:0] MISA_VALUE = CORE_MISA | (X_EXT ? X_MISA : 32'h0000_0000);
 
   localparam logic [31:0] CSR_MTVT_MASK = {{MTVT_ADDR_WIDTH{1'b1}}, {(32-MTVT_ADDR_WIDTH){1'b0}}};
@@ -556,11 +559,21 @@ module cv32e40x_cs_registers import cv32e40x_pkg::*;
       end
 
       CSR_TIME: begin
-        csr_rdata_int = time_i[31:0];
+        if (ZICNTR) begin : zicntr_time
+          csr_rdata_int = time_i[31:0];
+        end else begin : no_zicntr_time
+          csr_rdata_int    = '0;
+          illegal_csr_read = 1'b1;
+        end
       end
 
       CSR_TIMEH: begin
-        csr_rdata_int = time_i[63:32];
+        if (ZICNTR) begin : zicntr_timeh
+          csr_rdata_int = time_i[63:32];
+        end else begin : no_zicntr_timeh
+          csr_rdata_int    = '0;
+          illegal_csr_read = 1'b1;
+        end
       end
 
       // Hardware Performance Monitor
@@ -573,19 +586,47 @@ module cv32e40x_cs_registers import cv32e40x_pkg::*;
       CSR_MHPMCOUNTER16, CSR_MHPMCOUNTER17, CSR_MHPMCOUNTER18, CSR_MHPMCOUNTER19,
       CSR_MHPMCOUNTER20, CSR_MHPMCOUNTER21, CSR_MHPMCOUNTER22, CSR_MHPMCOUNTER23,
       CSR_MHPMCOUNTER24, CSR_MHPMCOUNTER25, CSR_MHPMCOUNTER26, CSR_MHPMCOUNTER27,
-      CSR_MHPMCOUNTER28, CSR_MHPMCOUNTER29, CSR_MHPMCOUNTER30, CSR_MHPMCOUNTER31,
-      CSR_CYCLE,
-      CSR_INSTRET,
+      CSR_MHPMCOUNTER28, CSR_MHPMCOUNTER29, CSR_MHPMCOUNTER30, CSR_MHPMCOUNTER31 : begin
+        csr_rdata_int = mhpmcounter_rdata[csr_raddr[4:0]][31:0];
+        csr_counter_read_o = 1'b1;
+      end
+
+
+      CSR_CYCLE, CSR_INSTRET : begin
+        if (ZICNTR) begin : zicntr_counters
+          csr_rdata_int = mhpmcounter_rdata[csr_raddr[4:0]][31:0];
+          csr_counter_read_o = 1'b1;
+        end else begin : no_zicntr_counters
+          csr_rdata_int    = '0;
+          illegal_csr_read = 1'b1;
+        end
+      end
+
+      CSR_CYCLEH, CSR_INSTRETH : begin
+        if (ZICNTR) begin : zicntr_hcounters
+        csr_rdata_int = mhpmcounter_rdata[csr_raddr[4:0]][63:32];
+          csr_counter_read_o = 1'b1;
+        end else begin : no_zicntr_hcounters
+          csr_rdata_int    = '0;
+          illegal_csr_read = 1'b1;
+        end
+      end
+
       CSR_HPMCOUNTER3,
       CSR_HPMCOUNTER4,  CSR_HPMCOUNTER5,  CSR_HPMCOUNTER6,  CSR_HPMCOUNTER7,
       CSR_HPMCOUNTER8,  CSR_HPMCOUNTER9,  CSR_HPMCOUNTER10, CSR_HPMCOUNTER11,
       CSR_HPMCOUNTER12, CSR_HPMCOUNTER13, CSR_HPMCOUNTER14, CSR_HPMCOUNTER15,
       CSR_HPMCOUNTER16, CSR_HPMCOUNTER17, CSR_HPMCOUNTER18, CSR_HPMCOUNTER19,
       CSR_HPMCOUNTER20, CSR_HPMCOUNTER21, CSR_HPMCOUNTER22, CSR_HPMCOUNTER23,
       CSR_HPMCOUNTER24, CSR_HPMCOUNTER25, CSR_HPMCOUNTER26, CSR_HPMCOUNTER27,
-      CSR_HPMCOUNTER28, CSR_HPMCOUNTER29, CSR_HPMCOUNTER30, CSR_HPMCOUNTER31: begin
-        csr_rdata_int = mhpmcounter_rdata[csr_raddr[4:0]][31:0];
-        csr_counter_read_o = 1'b1;
+      CSR_HPMCOUNTER28, CSR_HPMCOUNTER29, CSR_HPMCOUNTER30, CSR_HPMCOUNTER31 : begin
+        if (ZIHPM) begin : zihpm_counters
+          csr_rdata_int = mhpmcounter_rdata[csr_raddr[4:0]][31:0];
+          csr_counter_read_o = 1'b1;
+        end else begin : no_zihpm_counters
+          csr_rdata_int    = '0;
+          illegal_csr_read = 1'b1;
+        end
       end
 
       CSR_MCYCLEH,
@@ -597,19 +638,26 @@ module cv32e40x_cs_registers import cv32e40x_pkg::*;
       CSR_MHPMCOUNTER16H, CSR_MHPMCOUNTER17H, CSR_MHPMCOUNTER18H, CSR_MHPMCOUNTER19H,
       CSR_MHPMCOUNTER20H, CSR_MHPMCOUNTER21H, CSR_MHPMCOUNTER22H, CSR_MHPMCOUNTER23H,
       CSR_MHPMCOUNTER24H, CSR_MHPMCOUNTER25H, CSR_MHPMCOUNTER26H, CSR_MHPMCOUNTER27H,
-      CSR_MHPMCOUNTER28H, CSR_MHPMCOUNTER29H, CSR_MHPMCOUNTER30H, CSR_MHPMCOUNTER31H,
-      CSR_CYCLEH,
-      CSR_INSTRETH,
+      CSR_MHPMCOUNTER28H, CSR_MHPMCOUNTER29H, CSR_MHPMCOUNTER30H, CSR_MHPMCOUNTER31H: begin
+        csr_rdata_int = mhpmcounter_rdata[csr_raddr[4:0]][63:32];
+        csr_counter_read_o = 1'b1;
+      end
+
       CSR_HPMCOUNTER3H,
       CSR_HPMCOUNTER4H,  CSR_HPMCOUNTER5H,  CSR_HPMCOUNTER6H,  CSR_HPMCOUNTER7H,
       CSR_HPMCOUNTER8H,  CSR_HPMCOUNTER9H,  CSR_HPMCOUNTER10H, CSR_HPMCOUNTER11H,
       CSR_HPMCOUNTER12H, CSR_HPMCOUNTER13H, CSR_HPMCOUNTER14H, CSR_HPMCOUNTER15H,
       CSR_HPMCOUNTER16H, CSR_HPMCOUNTER17H, CSR_HPMCOUNTER18H, CSR_HPMCOUNTER19H,
       CSR_HPMCOUNTER20H, CSR_HPMCOUNTER21H, CSR_HPMCOUNTER22H, CSR_HPMCOUNTER23H,
       CSR_HPMCOUNTER24H, CSR_HPMCOUNTER25H, CSR_HPMCOUNTER26H, CSR_HPMCOUNTER27H,
-      CSR_HPMCOUNTER28H, CSR_HPMCOUNTER29H, CSR_HPMCOUNTER30H, CSR_HPMCOUNTER31H: begin
-        csr_rdata_int = mhpmcounter_rdata[csr_raddr[4:0]][63:32];
-        csr_counter_read_o = 1'b1;
+      CSR_HPMCOUNTER28H, CSR_HPMCOUNTER29H, CSR_HPMCOUNTER30H, CSR_HPMCOUNTER31H  : begin
+        if (ZIHPM) begin : zihpm_hcounters
+          csr_rdata_int      = mhpmcounter_rdata[csr_raddr[4:0]][63:32];
+          csr_counter_read_o = 1'b1;
+        end else begin : no_zihpm_hcounters
+          csr_rdata_int    = '0;
+          illegal_csr_read = 1'b1;
+        end
       end
 
       // mvendorid: Machine Vendor ID

rtl/cv32e40x_id_stage.sv

@@ -462,13 +462,19 @@ module cv32e40x_id_stage import cv32e40x_pkg::*;
     .tbljmp_first_i                  ( tbljmp_first              )
   );
 
-  // Speculatively read all source registers for illegal instr, might be required by coprocessor
-  // Non-offloaded instructions will use maximum two read ports (rf_re from decoder is two bits, rf_re_o may be two or three bits wide)
-  // Todo:XIF Too conservative, causes load_use stalls on offloaded instruction when the operands may not be needed at all.
-  //       issue_valid depends on halt_id (and data_rvalid) via the local instr_valid.
-  //       Can issue_valid be made fast by using the registered instr_valid and only factor in kill_id and not halt_id?
-  //       Maybe it is ok to have a late issue_valid, as accept signal will depend on late rs_valid anyway?
-  assign rf_re_o        = illegal_insn ? '1 : REGFILE_NUM_READ_PORTS'(rf_re);
+  generate
+    if (X_EXT) begin : x_ext_rf_re
+      // Speculatively read all source registers for illegal instr, might be required by coprocessor
+      // Non-offloaded instructions will use maximum two read ports (rf_re from decoder is two bits, rf_re_o may be two or three bits wide)
+      // Todo:XIF Too conservative, causes load_use stalls on offloaded instruction when the operands may not be needed at all.
+      //       issue_valid depends on halt_id (and data_rvalid) via the local instr_valid.
+      //       Can issue_valid be made fast by using the registered instr_valid and only factor in kill_id and not halt_id?
+      //       Maybe it is ok to have a late issue_valid, as accept signal will depend on late rs_valid anyway?
+      assign rf_re_o = illegal_insn ? '1 : REGFILE_NUM_READ_PORTS'(rf_re);
+    end else begin : no_x_ext_rf_re
+      assign rf_re_o = rf_re;
+    end
+  endgenerate
 
   // Register writeback is enabled either by the decoder or by the XIF
   assign rf_we          = rf_we_dec || xif_we;