Skip to content

Commit 1fa496c

Browse files
Silabs-ArjanBSilabs-ArjanB
authored
Merge pull request #768 from silabs-oysteink/silabs-oysteink_dm-region
Implemented DM_REGION
2 parents b3a36f5 + fb37642 commit 1fa496c

File tree

7 files changed

+159
-45
lines changed

7 files changed

+159
-45
lines changed

‎bhv/cv32e40x_wrapper.sv

Lines changed: 25 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -70,7 +70,9 @@ module cv32e40x_wrapper
7070
parameter int DBG_NUM_TRIGGERS = 1,
7171
parameter int PMA_NUM_REGIONS = 0,
7272
parameter pma_cfg_t PMA_CFG[PMA_NUM_REGIONS-1:0] = '{default:PMA_R_DEFAULT},
73-
parameter bit CORE_LOG_ENABLE = 1
73+
parameter bit CORE_LOG_ENABLE = 1,
74+
parameter logic [31:0] DM_REGION_START = 32'hF0000000,
75+
parameter logic [31:0] DM_REGION_END = 32'hF0003FFF
7476
)
7577
(
7678
// Clock and Reset
@@ -381,13 +383,19 @@ endgenerate
381383
cv32e40x_mpu_sva
382384
#(.PMA_NUM_REGIONS (PMA_NUM_REGIONS),
383385
.PMA_CFG (PMA_CFG),
384-
.IS_INSTR_SIDE (1))
386+
.IS_INSTR_SIDE (1),
387+
.CORE_RESP_TYPE (cv32e40x_pkg::inst_resp_t),
388+
.CORE_REQ_TYPE (cv32e40x_pkg::obi_inst_req_t),
389+
.DM_REGION_START (DM_REGION_START),
390+
.DM_REGION_END (DM_REGION_END))
385391
mpu_if_sva(.pma_addr (pma_i.trans_addr_i),
386392
.pma_cfg (pma_i.pma_cfg),
393+
.pma_dbg (core_i.if_stage_i.mpu_i.core_trans_i.dbg),
387394
.obi_memtype (core_i.instr_memtype_o),
388395
.obi_addr (core_i.instr_addr_o),
389396
.obi_req (core_i.instr_req_o),
390397
.obi_gnt (core_i.instr_gnt_i),
398+
.obi_dbg (core_i.instr_dbg_o),
391399
.write_buffer_state (cv32e40x_pkg::WBUF_EMPTY),
392400
.write_buffer_valid_o ('0),
393401
.write_buffer_txn_bufferable ('0),
@@ -397,17 +405,23 @@ endgenerate
397405
bind cv32e40x_mpu:
398406
core_i.load_store_unit_i.mpu_i
399407
cv32e40x_mpu_sva
400-
#(.PMA_NUM_REGIONS(PMA_NUM_REGIONS),
401-
.PMA_CFG(PMA_CFG),
402-
.IS_INSTR_SIDE(0),
403-
.CORE_RESP_TYPE(cv32e40x_pkg::data_resp_t),
404-
.X_EXT (X_EXT))
405-
mpu_lsu_sva(.pma_addr(pma_i.trans_addr_i),
406-
.pma_cfg (pma_i.pma_cfg),
408+
#(.PMA_NUM_REGIONS (PMA_NUM_REGIONS),
409+
.PMA_CFG (PMA_CFG),
410+
.IS_INSTR_SIDE (0),
411+
.CORE_RESP_TYPE (cv32e40x_pkg::data_resp_t),
412+
.CORE_REQ_TYPE (cv32e40x_pkg::obi_data_req_t),
413+
.X_EXT (X_EXT),
414+
.A_EXT (A_EXT),
415+
.DM_REGION_START (DM_REGION_START),
416+
.DM_REGION_END (DM_REGION_END))
417+
mpu_lsu_sva(.pma_addr (pma_i.trans_addr_i),
418+
.pma_cfg (pma_i.pma_cfg),
419+
.pma_dbg (core_i.load_store_unit_i.mpu_i.core_trans_i.dbg),
407420
.obi_memtype (core_i.data_memtype_o),
408421
.obi_addr (core_i.data_addr_o),
409422
.obi_req (core_i.data_req_o),
410423
.obi_gnt (core_i.data_gnt_i),
424+
.obi_dbg (core_i.data_dbg_o),
411425
.write_buffer_state (core_i.load_store_unit_i.write_buffer_i.state),
412426
.write_buffer_valid_o (core_i.load_store_unit_i.write_buffer_i.valid_o),
413427
.write_buffer_txn_bufferable (core_i.load_store_unit_i.write_buffer_i.trans_o.memtype[0]),
@@ -750,6 +764,8 @@ endgenerate
750764
.SMCLIC ( SMCLIC ),
751765
.SMCLIC_ID_WIDTH ( SMCLIC_ID_WIDTH ),
752766
.SMCLIC_INTTHRESHBITS ( SMCLIC_INTTHRESHBITS ),
767+
.DM_REGION_START ( DM_REGION_START ),
768+
.DM_REGION_END ( DM_REGION_END ),
753769
.DBG_NUM_TRIGGERS ( DBG_NUM_TRIGGERS ),
754770
.PMA_NUM_REGIONS ( PMA_NUM_REGIONS ),
755771
.PMA_CFG ( PMA_CFG ))

‎rtl/cv32e40x_core.sv

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -36,6 +36,8 @@ module cv32e40x_core import cv32e40x_pkg::*;
3636
parameter bit A_EXT = 0,
3737
parameter b_ext_e B_EXT = B_NONE,
3838
parameter m_ext_e M_EXT = M,
39+
parameter logic [31:0] DM_REGION_START = 32'hF0000000,
40+
parameter logic [31:0] DM_REGION_END = 32'hF0003FFF,
3941
parameter int DBG_NUM_TRIGGERS = 1,
4042
parameter int PMA_NUM_REGIONS = 0,
4143
parameter pma_cfg_t PMA_CFG[PMA_NUM_REGIONS-1:0] = '{default:PMA_R_DEFAULT},
@@ -436,7 +438,9 @@ module cv32e40x_core import cv32e40x_pkg::*;
436438
.SMCLIC ( SMCLIC ),
437439
.SMCLIC_ID_WIDTH ( SMCLIC_ID_WIDTH ),
438440
.ZC_EXT ( ZC_EXT ),
439-
.M_EXT ( M_EXT )
441+
.M_EXT ( M_EXT ),
442+
.DM_REGION_START ( DM_REGION_START ),
443+
.DM_REGION_END ( DM_REGION_END )
440444
)
441445
if_stage_i
442446
(
@@ -629,7 +633,9 @@ module cv32e40x_core import cv32e40x_pkg::*;
629633
.X_ID_WIDTH (X_ID_WIDTH ),
630634
.PMA_NUM_REGIONS (PMA_NUM_REGIONS ),
631635
.PMA_CFG (PMA_CFG ),
632-
.DBG_NUM_TRIGGERS (DBG_NUM_TRIGGERS )
636+
.DBG_NUM_TRIGGERS (DBG_NUM_TRIGGERS ),
637+
.DM_REGION_START (DM_REGION_START ),
638+
.DM_REGION_END (DM_REGION_END )
633639
)
634640
load_store_unit_i
635641
(

‎rtl/cv32e40x_if_stage.sv

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,9 @@ module cv32e40x_if_stage import cv32e40x_pkg::*;
3939
parameter bit SMCLIC = 1'b0,
4040
parameter int SMCLIC_ID_WIDTH = 5,
4141
parameter bit ZC_EXT = 0,
42-
parameter m_ext_e M_EXT = M_NONE
42+
parameter m_ext_e M_EXT = M_NONE,
43+
parameter logic [31:0] DM_REGION_START = 32'hF0000000,
44+
parameter logic [31:0] DM_REGION_END = 32'hF0003FFF
4345
)
4446
(
4547
input logic clk,
@@ -232,7 +234,9 @@ module cv32e40x_if_stage import cv32e40x_pkg::*;
232234
.CORE_RESP_TYPE ( inst_resp_t ),
233235
.BUS_RESP_TYPE ( obi_inst_resp_t ),
234236
.PMA_NUM_REGIONS ( PMA_NUM_REGIONS ),
235-
.PMA_CFG ( PMA_CFG )
237+
.PMA_CFG ( PMA_CFG ),
238+
.DM_REGION_START ( DM_REGION_START ),
239+
.DM_REGION_END ( DM_REGION_END )
236240
)
237241
mpu_i
238242
(

‎rtl/cv32e40x_load_store_unit.sv

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,9 @@ module cv32e40x_load_store_unit import cv32e40x_pkg::*;
3232
parameter int X_ID_WIDTH = 4,
3333
parameter int PMA_NUM_REGIONS = 0,
3434
parameter pma_cfg_t PMA_CFG[PMA_NUM_REGIONS-1:0] = '{default:PMA_R_DEFAULT},
35-
parameter int DBG_NUM_TRIGGERS = 1
35+
parameter int DBG_NUM_TRIGGERS = 1,
36+
parameter logic [31:0] DM_REGION_START = 32'hF0000000,
37+
parameter logic [31:0] DM_REGION_END = 32'hF0003FFF
3638
)
3739
(
3840
input logic clk,
@@ -720,7 +722,9 @@ module cv32e40x_load_store_unit import cv32e40x_pkg::*;
720722
.BUS_RESP_TYPE ( obi_data_resp_t ),
721723
.CORE_REQ_TYPE ( obi_data_req_t ),
722724
.PMA_NUM_REGIONS ( PMA_NUM_REGIONS ),
723-
.PMA_CFG ( PMA_CFG )
725+
.PMA_CFG ( PMA_CFG ),
726+
.DM_REGION_START ( DM_REGION_START ),
727+
.DM_REGION_END ( DM_REGION_END )
724728
)
725729
mpu_i
726730
(

‎rtl/cv32e40x_mpu.sv

Lines changed: 19 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,9 @@ module cv32e40x_mpu import cv32e40x_pkg::*;
3131
parameter type CORE_RESP_TYPE = inst_resp_t,
3232
parameter type BUS_RESP_TYPE = obi_inst_resp_t,
3333
parameter int PMA_NUM_REGIONS = 0,
34-
parameter pma_cfg_t PMA_CFG[PMA_NUM_REGIONS-1:0] = '{default:PMA_R_DEFAULT})
34+
parameter pma_cfg_t PMA_CFG[PMA_NUM_REGIONS-1:0] = '{default:PMA_R_DEFAULT},
35+
parameter logic [31:0] DM_REGION_START = 32'hF0000000,
36+
parameter logic [31:0] DM_REGION_END = 32'hF0003FFF)
3537
(
3638
input logic clk,
3739
input logic rst_n,
@@ -82,6 +84,10 @@ module cv32e40x_mpu import cv32e40x_pkg::*;
8284
logic instr_fetch_access;
8385
logic load_access;
8486
logic wpt_match;
87+
logic core_trans_debug_region;
88+
89+
// Detect a debug mode transaction to the Debug Module region
90+
assign core_trans_debug_region = (core_trans_i.addr >= DM_REGION_START) && (core_trans_i.addr <= DM_REGION_END) && core_trans_i.dbg;
8591

8692
// FSM that will "consume" transfers failing PMA checks.
8793
// Upon failing checks, this FSM will prevent the transfer from going out on the bus
@@ -185,20 +191,21 @@ module cv32e40x_mpu import cv32e40x_pkg::*;
185191
// PMA - Physical Memory Attribution
186192
cv32e40x_pma
187193
#(
188-
.A_EXT ( A_EXT ),
189-
.PMA_NUM_REGIONS ( PMA_NUM_REGIONS ),
190-
.PMA_CFG ( PMA_CFG )
194+
.A_EXT ( A_EXT ),
195+
.PMA_NUM_REGIONS ( PMA_NUM_REGIONS ),
196+
.PMA_CFG ( PMA_CFG )
191197
)
192198
pma_i
193199
(
194-
.trans_addr_i ( core_trans_i.addr ),
195-
.instr_fetch_access_i ( instr_fetch_access ),
196-
.atomic_access_i ( atomic_access_i ),
197-
.misaligned_access_i ( misaligned_access_i ),
198-
.load_access_i ( load_access ),
199-
.pma_err_o ( pma_err ),
200-
.pma_bufferable_o ( bus_trans_bufferable ),
201-
.pma_cacheable_o ( bus_trans_cacheable )
200+
.trans_addr_i ( core_trans_i.addr ),
201+
.trans_debug_region_i ( core_trans_debug_region ),
202+
.instr_fetch_access_i ( instr_fetch_access ),
203+
.atomic_access_i ( atomic_access_i ),
204+
.misaligned_access_i ( misaligned_access_i ),
205+
.load_access_i ( load_access ),
206+
.pma_err_o ( pma_err ),
207+
.pma_bufferable_o ( bus_trans_bufferable ),
208+
.pma_cacheable_o ( bus_trans_cacheable )
202209
);
203210

204211
assign mpu_err = pma_err;

‎rtl/cv32e40x_pma.sv

Lines changed: 35 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1,13 +1,13 @@
11
// Copyright 2021 Silicon Labs, Inc.
2-
//
2+
//
33
// This file, and derivatives thereof are licensed under the
44
// Solderpad License, Version 2.0 (the "License");
55
// Use of this file means you agree to the terms and conditions
66
// of the license and are in full compliance with the License.
77
// You may obtain a copy of the License at
8-
//
8+
//
99
// https://solderpad.org/licenses/SHL-2.0/
10-
//
10+
//
1111
// Unless required by applicable law or agreed to in writing, software
1212
// and hardware implementations thereof
1313
// distributed under the License is distributed on an "AS IS" BASIS,
@@ -24,13 +24,14 @@
2424
////////////////////////////////////////////////////////////////////////////////
2525

2626
module cv32e40x_pma import cv32e40x_pkg::*;
27-
#(
27+
#(
2828
parameter bit A_EXT = 0,
2929
parameter int PMA_NUM_REGIONS = 0,
3030
parameter pma_cfg_t PMA_CFG[PMA_NUM_REGIONS-1:0] = '{default:PMA_R_DEFAULT}
3131
)
3232
(
3333
input logic [31:0] trans_addr_i,
34+
input logic trans_debug_region_i, // Transaction address is inside the debug region
3435
input logic instr_fetch_access_i, // Indicate that ongoing access is an instruction fetch
3536
input logic atomic_access_i, // Indicate that ongoing access is atomic
3637
input logic misaligned_access_i, // Indicate that ongoing access is part of a misaligned access
@@ -39,9 +40,18 @@ module cv32e40x_pma import cv32e40x_pkg::*;
3940
output logic pma_bufferable_o,
4041
output logic pma_cacheable_o
4142
);
42-
43+
4344
parameter PMA_ADDR_LSB = 0; // TODO:OE experiment and see if this makes a difference
44-
45+
46+
// Attributes for accessing the DM (DM_REGION_START:DM_REGION_END) in debug mode
47+
localparam pma_cfg_t PMA_DBG = '{word_addr_low : '0, // not used
48+
word_addr_high : '0, // not used
49+
main : 1'b1,
50+
bufferable : 1'b0,
51+
cacheable : 1'b0,
52+
atomic : 1'b0};
53+
54+
4555
pma_cfg_t pma_cfg;
4656
logic [31:0] word_addr;
4757
logic pma_cfg_atomic;
@@ -52,24 +62,36 @@ module cv32e40x_pma import cv32e40x_pkg::*;
5262
generate
5363
if(PMA_NUM_REGIONS == 0) begin: no_pma
5464

55-
// PMA is deconfigured
56-
assign pma_cfg = NO_PMA_R_DEFAULT;
65+
always_comb begin
66+
// PMA is deconfigured, use NO_PMA_R_DEFAULT as default.
67+
pma_cfg = NO_PMA_R_DEFAULT;
68+
69+
// Debug mode transactions within the Debug Module region use PMA_DBG as attributes for the DM range
70+
if (trans_debug_region_i) begin
71+
pma_cfg = PMA_DBG;
72+
end
73+
end
5774

5875
end
5976
else begin: pma
6077

6178
// Identify PMA region
6279
always_comb begin
6380

64-
// If no match, use default PMA config
81+
// If no match, use default PMA config as default.
6582
pma_cfg = PMA_R_DEFAULT;
6683

6784
for(int i = PMA_NUM_REGIONS-1; i >= 0; i--) begin
68-
if((word_addr[31:PMA_ADDR_LSB] >= PMA_CFG[i].word_addr_low[31:PMA_ADDR_LSB]) &&
85+
if((word_addr[31:PMA_ADDR_LSB] >= PMA_CFG[i].word_addr_low[31:PMA_ADDR_LSB]) &&
6986
(word_addr[31:PMA_ADDR_LSB] < PMA_CFG[i].word_addr_high[31:PMA_ADDR_LSB])) begin
7087
pma_cfg = PMA_CFG[i];
7188
end
7289
end
90+
91+
// Debug mode transactions within the Debug Module region use PMA_DBG as attributes for the DM range
92+
if (trans_debug_region_i) begin
93+
pma_cfg = PMA_DBG;
94+
end
7395
end
7496
end
7597

@@ -84,10 +106,10 @@ module cv32e40x_pma import cv32e40x_pkg::*;
84106
assign pma_cfg_atomic = 1'b0;
85107
end
86108
endgenerate
87-
109+
88110
// Check transaction based on PMA region config
89111
always_comb begin
90-
112+
91113
pma_err_o = 1'b0;
92114

93115
// Check for atomic access
@@ -110,5 +132,5 @@ module cv32e40x_pma import cv32e40x_pkg::*;
110132
// Instruction fetches, atomic operations and loads are never classified as bufferable
111133
assign pma_bufferable_o = pma_cfg.bufferable && !instr_fetch_access_i && !atomic_access_i && !load_access_i;
112134
assign pma_cacheable_o = pma_cfg.cacheable;
113-
135+
114136
endmodule

0 commit comments

Comments
 (0)