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ironhouzilewis6991
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add: Verilog defaults
Add to DEFAULT_TYPE_PATTERNS, treesitter syntax node types utilized by Verilog. The list of added node types are probably not exhaustive, but these seem to be the ones needed for basic use.
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lua/treesitter-context.lua

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@@ -117,6 +117,10 @@ local DEFAULT_TYPE_PATTERNS = {
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scala = {
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'object_definition',
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},
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verilog = {
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'always_construct',
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'statement_or_null',
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},
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vhdl = {
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'process_statement',
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'architecture_body',

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