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Merge branch 'llvm:main' into bigMac
2 parents 8b63a9b + bae7bd9 commit 122356b

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‎clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -158,7 +158,7 @@ class CIRBaseBuilderTy : public mlir::OpBuilder {
158158
llvm_unreachable("Zero initializer for given type is NYI");
159159
}
160160

161-
mlir::Value createLoad(mlir::Location loc, mlir::Value ptr,
161+
cir::LoadOp createLoad(mlir::Location loc, mlir::Value ptr,
162162
bool isVolatile = false, uint64_t alignment = 0) {
163163
mlir::IntegerAttr intAttr;
164164
if (alignment)
@@ -167,7 +167,9 @@ class CIRBaseBuilderTy : public mlir::OpBuilder {
167167

168168
return create<cir::LoadOp>(loc, ptr, /*isDeref=*/false, isVolatile,
169169
/*alignment=*/intAttr,
170-
/*mem_order=*/cir::MemOrderAttr{});
170+
/*mem_order=*/
171+
cir::MemOrderAttr{},
172+
/*tbaa=*/mlir::ArrayAttr{});
171173
}
172174

173175
mlir::Value createAlignedLoad(mlir::Location loc, mlir::Value ptr,
@@ -353,7 +355,8 @@ class CIRBaseBuilderTy : public mlir::OpBuilder {
353355
if (mlir::cast<cir::PointerType>(dst.getType()).getPointee() !=
354356
val.getType())
355357
dst = createPtrBitcast(dst, val.getType());
356-
return create<cir::StoreOp>(loc, val, dst, _volatile, align, order);
358+
return create<cir::StoreOp>(loc, val, dst, _volatile, align, order,
359+
/*tbaa=*/mlir::ArrayAttr{});
357360
}
358361

359362
mlir::Value createAlloca(mlir::Location loc, cir::PointerType addrType,
@@ -400,7 +403,8 @@ class CIRBaseBuilderTy : public mlir::OpBuilder {
400403
/// Create a copy with inferred length.
401404
cir::CopyOp createCopy(mlir::Value dst, mlir::Value src,
402405
bool isVolatile = false) {
403-
return create<cir::CopyOp>(dst.getLoc(), dst, src, isVolatile);
406+
return create<cir::CopyOp>(dst.getLoc(), dst, src, isVolatile,
407+
/*tbaa=*/mlir::ArrayAttr{});
404408
}
405409

406410
cir::MemCpyOp createMemCpy(mlir::Location loc, mlir::Value dst,

‎clang/include/clang/CIR/Dialect/IR/CIRAttrs.td

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1216,6 +1216,9 @@ def GlobalAnnotationValuesAttr : CIR_Attr<"GlobalAnnotationValues",
12161216
let genVerifyDecl = 1;
12171217
}
12181218

1219+
def CIR_TBAAAttr : CIR_Attr<"TBAA", "tbaa", []> {
1220+
}
1221+
12191222
include "clang/CIR/Dialect/IR/CIROpenCLAttrs.td"
12201223

12211224
#endif // MLIR_CIR_DIALECT_CIR_ATTRS

‎clang/include/clang/CIR/Dialect/IR/CIROps.td

Lines changed: 43 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -587,7 +587,8 @@ def LoadOp : CIR_Op<"load", [
587587
[MemRead]>:$addr, UnitAttr:$isDeref,
588588
UnitAttr:$is_volatile,
589589
OptionalAttr<I64Attr>:$alignment,
590-
OptionalAttr<MemOrder>:$mem_order
590+
OptionalAttr<MemOrder>:$mem_order,
591+
OptionalAttr<ArrayAttr>:$tbaa
591592
);
592593
let results = (outs CIR_AnyType:$result);
593594

@@ -597,6 +598,7 @@ def LoadOp : CIR_Op<"load", [
597598
(`align` `(` $alignment^ `)`)?
598599
(`atomic` `(` $mem_order^ `)`)?
599600
$addr `:` qualified(type($addr)) `,` type($result) attr-dict
601+
(`tbaa` `(` $tbaa^ `)`)?
600602
}];
601603

602604
let extraClassDeclaration = [{
@@ -654,13 +656,15 @@ def StoreOp : CIR_Op<"store", [
654656
[MemWrite]>:$addr,
655657
UnitAttr:$is_volatile,
656658
OptionalAttr<I64Attr>:$alignment,
657-
OptionalAttr<MemOrder>:$mem_order);
659+
OptionalAttr<MemOrder>:$mem_order,
660+
OptionalAttr<ArrayAttr>:$tbaa);
658661

659662
let assemblyFormat = [{
660663
(`volatile` $is_volatile^)?
661664
(`align` `(` $alignment^ `)`)?
662665
(`atomic` `(` $mem_order^ `)`)?
663666
$value `,` $addr attr-dict `:` type($value) `,` qualified(type($addr))
667+
(`tbaa` `(` $tbaa^ `)`)?
664668
}];
665669

666670
let extraClassDeclaration = [{
@@ -1268,8 +1272,7 @@ def CmpOp : CIR_Op<"cmp", [Pure, SameTypeOperands]> {
12681272
```
12691273
}];
12701274

1271-
// TODO: get more accurate than CIR_AnyType
1272-
let results = (outs CIR_AnyType:$result);
1275+
let results = (outs CIR_BoolType:$result);
12731276
let arguments = (ins Arg<CmpOpKind, "cmp kind">:$kind,
12741277
CIR_AnyType:$lhs, CIR_AnyType:$rhs);
12751278

@@ -3981,7 +3984,8 @@ def CopyOp : CIR_Op<"copy",
39813984
DeclareOpInterfaceMethods<PromotableMemOpInterface>]> {
39823985
let arguments = (ins Arg<CIR_PointerType, "", [MemWrite]>:$dst,
39833986
Arg<CIR_PointerType, "", [MemRead]>:$src,
3984-
UnitAttr:$is_volatile);
3987+
UnitAttr:$is_volatile,
3988+
OptionalAttr<ArrayAttr>:$tbaa);
39853989
let summary = "Copies contents from a CIR pointer to another";
39863990
let description = [{
39873991
Given two CIR pointers, `src` and `dst`, `cir.copy` will copy the memory
@@ -4000,7 +4004,9 @@ def CopyOp : CIR_Op<"copy",
40004004
}];
40014005

40024006
let assemblyFormat = [{$src `to` $dst (`volatile` $is_volatile^)?
4003-
attr-dict `:` qualified(type($dst)) }];
4007+
attr-dict `:` qualified(type($dst))
4008+
(`tbaa` `(` $tbaa^ `)`)?
4009+
}];
40044010
let hasVerifier = 1;
40054011

40064012
let extraClassDeclaration = [{
@@ -4148,6 +4154,37 @@ def MemSetOp : CIR_Op<"libc.memset"> {
41484154
let hasVerifier = 0;
41494155
}
41504156

4157+
//===----------------------------------------------------------------------===//
4158+
// MemSetInlineOp
4159+
//===----------------------------------------------------------------------===//
4160+
4161+
def MemSetInlineOp : CIR_Op<"memset_inline"> {
4162+
let arguments = (ins Arg<VoidPtr, "", [MemWrite]>:$dst,
4163+
SInt32:$val,
4164+
I64Attr:$len);
4165+
let summary = "Fill a block of memory with constant length without calling"
4166+
"any external function";
4167+
let description = [{
4168+
Given the CIR pointer, `dst`, `cir.memset_inline` will set the first `len`
4169+
bytes of the memory pointed by `dst` to the specified `val`.
4170+
4171+
The `len` argument must be a constant integer argument specifying the number
4172+
of bytes to fill.
4173+
4174+
Examples:
4175+
4176+
```mlir
4177+
// Set 2 bytes from a struct to 0
4178+
cir.memset_inline 2 bytes from %struct set to %zero : !cir.ptr<!void>, !s32i
4179+
```
4180+
}];
4181+
4182+
let assemblyFormat = [{
4183+
$len `bytes` `from` $dst `set` `to` $val attr-dict
4184+
`:` qualified(type($dst)) `,` type($val)
4185+
}];
4186+
let hasVerifier = 0;
4187+
}
41514188
//===----------------------------------------------------------------------===//
41524189
// MemChrOp
41534190
//===----------------------------------------------------------------------===//

‎clang/include/clang/CIR/MissingFeatures.h

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -58,6 +58,7 @@ struct MissingFeatures {
5858
// sanitizer related type check features
5959
static bool emitTypeCheck() { return false; }
6060
static bool tbaa() { return false; }
61+
static bool tbaa_struct() { return false; }
6162
static bool cleanups() { return false; }
6263
static bool emitNullabilityCheck() { return false; }
6364
static bool ptrAuth() { return false; }
@@ -403,9 +404,6 @@ struct MissingFeatures {
403404
// specs. We should make it always present.
404405
static bool makeTripleAlwaysPresent() { return false; }
405406

406-
// This Itanium bit is currently being skipped in cir.
407-
static bool itaniumRecordLayoutBuilderFinishLayout() { return false; }
408-
409407
static bool mustProgress() { return false; }
410408

411409
static bool skipTempCopy() { return false; }

‎clang/lib/CIR/CodeGen/CIRGenAtomic.cpp

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -585,7 +585,7 @@ static void emitAtomicOp(CIRGenFunction &CGF, AtomicExpr *E, Address Dest,
585585
case AtomicExpr::AO__atomic_load:
586586
case AtomicExpr::AO__scoped_atomic_load_n:
587587
case AtomicExpr::AO__scoped_atomic_load: {
588-
auto *load = builder.createLoad(loc, Ptr).getDefiningOp();
588+
auto load = builder.createLoad(loc, Ptr);
589589
// FIXME(cir): add scope information.
590590
assert(!cir::MissingFeatures::syncScopeID());
591591
load->setAttr("mem_order", orderAttr);
@@ -1462,8 +1462,7 @@ void CIRGenFunction::emitAtomicStore(RValue rvalue, LValue dest,
14621462
if (IsVolatile)
14631463
store.setIsVolatile(true);
14641464

1465-
// DecorateInstructionWithTBAA
1466-
assert(!cir::MissingFeatures::tbaa());
1465+
CGM.decorateOperationWithTBAA(store, dest.getTBAAInfo());
14671466
return;
14681467
}
14691468

‎clang/lib/CIR/CodeGen/CIRGenBuilder.h

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -623,6 +623,13 @@ class CIRGenBuilderTy : public cir::CIRBaseBuilderTy {
623623
return create<cir::MemSetOp>(loc, dst, val, len);
624624
}
625625

626+
cir::MemSetInlineOp createMemSetInline(mlir::Location loc, mlir::Value dst,
627+
mlir::Value val,
628+
mlir::IntegerAttr len) {
629+
val = createIntCast(val, cir::IntType::get(getContext(), 32, true));
630+
return create<cir::MemSetInlineOp>(loc, dst, val, len);
631+
}
632+
626633
mlir::Value createNeg(mlir::Value value) {
627634

628635
if (auto intTy = mlir::dyn_cast<cir::IntType>(value.getType())) {
@@ -825,7 +832,7 @@ class CIRGenBuilderTy : public cir::CIRBaseBuilderTy {
825832
addr.getAlignment());
826833
}
827834

828-
mlir::Value createLoad(mlir::Location loc, Address addr,
835+
cir::LoadOp createLoad(mlir::Location loc, Address addr,
829836
bool isVolatile = false) {
830837
auto ptrTy = mlir::dyn_cast<cir::PointerType>(addr.getPointer().getType());
831838
if (addr.getElementType() != ptrTy.getPointee())
@@ -835,7 +842,7 @@ class CIRGenBuilderTy : public cir::CIRBaseBuilderTy {
835842
return create<cir::LoadOp>(
836843
loc, addr.getElementType(), addr.getPointer(), /*isDeref=*/false,
837844
/*is_volatile=*/isVolatile, /*alignment=*/mlir::IntegerAttr{},
838-
/*mem_order=*/cir::MemOrderAttr{});
845+
/*mem_order=*/cir::MemOrderAttr{}, /*tbaa=*/mlir::ArrayAttr{});
839846
}
840847

841848
mlir::Value createAlignedLoad(mlir::Location loc, mlir::Type ty,

‎clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp

Lines changed: 14 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1554,8 +1554,20 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID,
15541554
return RValue::get(Dest.getPointer());
15551555
}
15561556

1557-
case Builtin::BI__builtin_memset_inline:
1558-
llvm_unreachable("BI__builtin_memset_inline NYI");
1557+
case Builtin::BI__builtin_memset_inline: {
1558+
Address Dest = emitPointerWithAlignment(E->getArg(0));
1559+
mlir::Value ByteVal = emitScalarExpr(E->getArg(1));
1560+
uint64_t size =
1561+
E->getArg(2)->EvaluateKnownConstInt(getContext()).getZExtValue();
1562+
emitNonNullArgCheck(RValue::get(Dest.getPointer()), E->getArg(0)->getType(),
1563+
E->getArg(0)->getExprLoc(), FD, 0);
1564+
builder.createMemSetInline(
1565+
getLoc(E->getSourceRange()), Dest.getPointer(), ByteVal,
1566+
mlir::IntegerAttr::get(mlir::IntegerType::get(builder.getContext(), 64),
1567+
size));
1568+
// __builtin_memset_inline has no return value
1569+
return RValue::get(nullptr);
1570+
}
15591571
case Builtin::BI__builtin___memset_chk: {
15601572
// fold __builtin_memset_chk(x, y, cst1, cst2) to memset iff cst1<=cst2.
15611573
llvm::APSInt size;

‎clang/lib/CIR/CodeGen/CIRGenClass.cpp

Lines changed: 12 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -751,8 +751,14 @@ void CIRGenFunction::initializeVTablePointer(mlir::Location loc,
751751
assert(!cir::MissingFeatures::addressSpace());
752752
VTableField = builder.createElementBitCast(loc, VTableField,
753753
VTableAddressPoint.getType());
754-
builder.createStore(loc, VTableAddressPoint, VTableField);
755-
assert(!cir::MissingFeatures::tbaa());
754+
auto storeOp = builder.createStore(loc, VTableAddressPoint, VTableField);
755+
TBAAAccessInfo TBAAInfo =
756+
CGM.getTBAAVTablePtrAccessInfo(VTableAddressPoint.getType());
757+
CGM.decorateOperationWithTBAA(storeOp, TBAAInfo);
758+
if (CGM.getCodeGenOpts().OptimizationLevel > 0 &&
759+
CGM.getCodeGenOpts().StrictVTablePointers) {
760+
assert(!cir::MissingFeatures::createInvariantGroup());
761+
}
756762
}
757763

758764
void CIRGenFunction::initializeVTablePointers(mlir::Location loc,
@@ -1659,14 +1665,16 @@ mlir::Value CIRGenFunction::getVTablePtr(mlir::Location Loc, Address This,
16591665

16601666
Address CIRGenFunction::emitCXXMemberDataPointerAddress(
16611667
const Expr *E, Address base, mlir::Value memberPtr,
1662-
const MemberPointerType *memberPtrType, LValueBaseInfo *baseInfo) {
1668+
const MemberPointerType *memberPtrType, LValueBaseInfo *baseInfo,
1669+
TBAAAccessInfo *tbaaInfo) {
16631670
assert(!cir::MissingFeatures::cxxABI());
16641671

16651672
auto op = builder.createGetIndirectMember(getLoc(E->getSourceRange()),
16661673
base.getPointer(), memberPtr);
16671674

16681675
QualType memberType = memberPtrType->getPointeeType();
1669-
CharUnits memberAlign = CGM.getNaturalTypeAlignment(memberType, baseInfo);
1676+
CharUnits memberAlign =
1677+
CGM.getNaturalTypeAlignment(memberType, baseInfo, tbaaInfo);
16701678
memberAlign = CGM.getDynamicOffsetAlignment(
16711679
base.getAlignment(), memberPtrType->getClass()->getAsCXXRecordDecl(),
16721680
memberAlign);

‎clang/lib/CIR/CodeGen/CIRGenDecl.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -327,7 +327,7 @@ void CIRGenFunction::emitAutoVarInit(const AutoVarEmission &emission) {
327327
// its removal/optimization to the CIR lowering.
328328
if (!constant || isa<CXXTemporaryObjectExpr>(Init)) {
329329
initializeWhatIsTechnicallyUninitialized(Loc);
330-
LValue lv = LValue::makeAddr(Loc, type, AlignmentSource::Decl);
330+
LValue lv = makeAddrLValue(Loc, type, AlignmentSource::Decl);
331331
emitExprAsInit(Init, &D, lv);
332332
// In case lv has uses it means we indeed initialized something
333333
// out of it while trying to build the expression, mark it as such.

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