@@ -477,6 +477,28 @@ class IndexBitOfArrayModule extends Module {
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}
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}
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+ class AssignSubsetModule extends Module {
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+ AssignSubsetModule (LogicArray updatedSubset,
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+ {int ? start, bool ? isError = false }) {
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+ final dim = ((isError != null && isError) ? 10 : 5 );
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+ updatedSubset = addInputArray ('inputLogicArray' , updatedSubset,
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+ dimensions: [dim], elementWidth: 3 );
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+
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+ final o =
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+ addOutputArray ('outputLogicArray' , dimensions: [10 ], elementWidth: 3 );
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+ final error = addOutput ('errorBit' );
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+ try {
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+ if (start != null ) {
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+ o.assignSubset (updatedSubset.elements, start: start);
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+ } else {
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+ o.assignSubset (updatedSubset.elements);
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+ }
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+ } on SignalWidthMismatchException {
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+ error <= Const (1 );
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+ }
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+ }
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+ }
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+
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void main () {
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tearDown (() async {
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await Simulator .reset ();
@@ -938,5 +960,58 @@ void main() {
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await SimCompare .checkFunctionalVector (mod, vectors);
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SimCompare .checkIverilogVector (mod, vectors);
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});
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+
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+ test ('assign subset of logic array without mentioning start' , () async {
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+ final updatedSubset = LogicArray ([5 ], 3 , name: 'updatedSubset' );
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+ final mod = AssignSubsetModule (updatedSubset);
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+ await mod.build ();
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+
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+ final vectors = [
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+ Vector ({'inputLogicArray' : 0 },
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+ {'outputLogicArray' : LogicValue .ofString (('z' * 15 ) + ('0' * 15 ))}),
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+ Vector ({'inputLogicArray' : bin ('101' * 5 )},
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+ {'outputLogicArray' : LogicValue .ofString (('z' * 15 ) + ('101' * 5 ))})
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+ ];
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+
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+ await SimCompare .checkFunctionalVector (mod, vectors);
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+ SimCompare .checkIverilogVector (mod, vectors);
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+ });
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+
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+ test ('assign subset of logic array with mentioning start' , () async {
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+ final updatedSubset = LogicArray ([5 ], 3 , name: 'updatedSubset' );
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+ final mod = AssignSubsetModule (updatedSubset, start: 3 );
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+ await mod.build ();
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+
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+ final vectors = [
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+ Vector ({
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+ 'inputLogicArray' : 0
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+ }, {
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+ 'outputLogicArray' :
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+ LogicValue .ofString (('z' * 3 * 2 ) + ('0' * 3 * 5 ) + ('z' * 3 * 3 ))
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+ }),
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+ Vector ({
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+ 'inputLogicArray' : bin ('101' * 5 )
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+ }, {
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+ 'outputLogicArray' :
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+ LogicValue .ofString (('z' * 3 * 2 ) + ('101' * 5 ) + ('z' * 3 * 3 ))
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+ }),
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+ ];
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+
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+ await SimCompare .checkFunctionalVector (mod, vectors);
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+ SimCompare .checkIverilogVector (mod, vectors);
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+ });
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+
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+ test ('error in assign subset of logic array' , () async {
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+ final updatedSubset = LogicArray ([10 ], 3 , name: 'updatedSubset' );
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+ final mod = AssignSubsetModule (updatedSubset, start: 3 , isError: true );
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+ await mod.build ();
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+
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+ final vectors = [
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+ Vector ({'inputLogicArray' : bin ('101' * 10 )}, {'errorBit' : 1 })
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+ ];
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+
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+ await SimCompare .checkFunctionalVector (mod, vectors);
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+ SimCompare .checkIverilogVector (mod, vectors);
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+ });
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});
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}
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