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Ruihan-YinRuihan-Yin
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Merge branch 'apx-rex2-oct' into apx-evex-legacy-oct
2 parents 74f8be2 + 866253d commit c4b162d

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12 files changed

+100
-94
lines changed

12 files changed

+100
-94
lines changed

‎coredistools.dll‎

-8.7 MB
Binary file not shown.

‎docs/design/features/xarch-apx.md‎

Lines changed: 0 additions & 3 deletions
This file was deleted.

‎src/coreclr/jit/codegenlinear.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2702,7 +2702,7 @@ void CodeGen::genEmitterUnitTests()
27022702
{
27032703
genAmd64EmitterUnitTestsSse2();
27042704
}
2705-
if (unitTestSectionAll || (u16_strstr(unitTestSection, W("apx")) != nullptr))
2705+
if (unitTestSectionAll || (strstr(unitTestSection, "apx") != nullptr))
27062706
{
27072707
genAmd64EmitterUnitTestsApx();
27082708
}

‎src/coreclr/jit/codegenxarch.cpp‎

Lines changed: 9 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -9070,7 +9070,7 @@ void CodeGen::genAmd64EmitterUnitTestsApx()
90709070
theEmitter->emitIns_R_R(INS_add, EA_2BYTE, REG_EAX, REG_ECX);
90719071
theEmitter->emitIns_R_R(INS_add, EA_4BYTE, REG_EAX, REG_ECX);
90729072
theEmitter->emitIns_R_R(INS_add, EA_8BYTE, REG_EAX, REG_ECX);
9073-
theEmitter->emitIns_R_R(INS_or, EA_4BYTE, REG_EAX, REG_ECX);
9073+
theEmitter->emitIns_R_R(INS_or, EA_4BYTE, REG_EAX, REG_ECX);
90749074
theEmitter->emitIns_R_R(INS_adc, EA_4BYTE, REG_EAX, REG_ECX);
90759075
theEmitter->emitIns_R_R(INS_sbb, EA_4BYTE, REG_EAX, REG_ECX);
90769076
theEmitter->emitIns_R_R(INS_and, EA_4BYTE, REG_EAX, REG_ECX);
@@ -9086,14 +9086,14 @@ void CodeGen::genAmd64EmitterUnitTestsApx()
90869086
theEmitter->emitIns_Mov(INS_mov, EA_4BYTE, REG_EAX, REG_ECX, false);
90879087
theEmitter->emitIns_Mov(INS_movsx, EA_2BYTE, REG_EAX, REG_ECX, false);
90889088
theEmitter->emitIns_Mov(INS_movzx, EA_2BYTE, REG_EAX, REG_ECX, false);
9089-
9089+
90909090
theEmitter->emitIns_R_R(INS_popcnt, EA_4BYTE, REG_EAX, REG_ECX);
90919091
theEmitter->emitIns_R_R(INS_lzcnt, EA_4BYTE, REG_EAX, REG_ECX);
90929092
theEmitter->emitIns_R_R(INS_tzcnt, EA_4BYTE, REG_EAX, REG_ECX);
90939093

90949094
theEmitter->emitIns_R_I(INS_add, EA_4BYTE, REG_ECX, 0x05);
90959095
theEmitter->emitIns_R_I(INS_add, EA_2BYTE, REG_ECX, 0x05);
9096-
theEmitter->emitIns_R_I(INS_or, EA_4BYTE, REG_EAX, 0x05);
9096+
theEmitter->emitIns_R_I(INS_or, EA_4BYTE, REG_EAX, 0x05);
90979097
theEmitter->emitIns_R_I(INS_adc, EA_4BYTE, REG_EAX, 0x05);
90989098
theEmitter->emitIns_R_I(INS_sbb, EA_4BYTE, REG_EAX, 0x05);
90999099
theEmitter->emitIns_R_I(INS_and, EA_4BYTE, REG_EAX, 0x05);
@@ -9146,7 +9146,7 @@ void CodeGen::genAmd64EmitterUnitTestsApx()
91469146
theEmitter->emitIns_R_AR(INS_add, EA_2BYTE, REG_EAX, REG_ECX, 4);
91479147
theEmitter->emitIns_R_AR(INS_add, EA_4BYTE, REG_EAX, REG_ECX, 4);
91489148
theEmitter->emitIns_R_AR(INS_add, EA_8BYTE, REG_EAX, REG_ECX, 4);
9149-
theEmitter->emitIns_R_AR(INS_or, EA_4BYTE, REG_EAX, REG_ECX, 4);
9149+
theEmitter->emitIns_R_AR(INS_or, EA_4BYTE, REG_EAX, REG_ECX, 4);
91509150
theEmitter->emitIns_R_AR(INS_adc, EA_4BYTE, REG_EAX, REG_ECX, 4);
91519151
theEmitter->emitIns_R_AR(INS_sbb, EA_4BYTE, REG_EAX, REG_ECX, 4);
91529152
theEmitter->emitIns_R_AR(INS_and, EA_4BYTE, REG_EAX, REG_ECX, 4);
@@ -9164,7 +9164,7 @@ void CodeGen::genAmd64EmitterUnitTestsApx()
91649164
theEmitter->emitIns_AR_R(INS_add, EA_2BYTE, REG_EAX, REG_ECX, 4);
91659165
theEmitter->emitIns_AR_R(INS_add, EA_4BYTE, REG_EAX, REG_ECX, 4);
91669166
theEmitter->emitIns_AR_R(INS_add, EA_8BYTE, REG_EAX, REG_ECX, 4);
9167-
theEmitter->emitIns_AR_R(INS_or, EA_4BYTE, REG_EAX, REG_ECX, 4);
9167+
theEmitter->emitIns_AR_R(INS_or, EA_4BYTE, REG_EAX, REG_ECX, 4);
91689168
theEmitter->emitIns_AR_R(INS_adc, EA_4BYTE, REG_EAX, REG_ECX, 4);
91699169
theEmitter->emitIns_AR_R(INS_sbb, EA_4BYTE, REG_EAX, REG_ECX, 4);
91709170
theEmitter->emitIns_AR_R(INS_and, EA_4BYTE, REG_EAX, REG_ECX, 4);
@@ -9181,7 +9181,7 @@ void CodeGen::genAmd64EmitterUnitTestsApx()
91819181
theEmitter->emitIns_R_S(INS_add, EA_2BYTE, REG_EAX, 0, 0);
91829182
theEmitter->emitIns_R_S(INS_add, EA_4BYTE, REG_EAX, 0, 0);
91839183
theEmitter->emitIns_R_S(INS_add, EA_8BYTE, REG_EAX, 0, 0);
9184-
theEmitter->emitIns_R_S(INS_or, EA_4BYTE, REG_EAX, 0, 0);
9184+
theEmitter->emitIns_R_S(INS_or, EA_4BYTE, REG_EAX, 0, 0);
91859185
theEmitter->emitIns_R_S(INS_adc, EA_4BYTE, REG_EAX, 0, 0);
91869186
theEmitter->emitIns_R_S(INS_sbb, EA_4BYTE, REG_EAX, 0, 0);
91879187
theEmitter->emitIns_R_S(INS_and, EA_4BYTE, REG_EAX, 0, 0);
@@ -9192,7 +9192,7 @@ void CodeGen::genAmd64EmitterUnitTestsApx()
91929192

91939193
theEmitter->emitIns_S_I(INS_shl_N, EA_4BYTE, 0, 0, 4);
91949194
theEmitter->emitIns_S(INS_shl_1, EA_4BYTE, 0, 4);
9195-
9195+
91969196
// theEmitter->emitIns_R_S(INS_movsx, EA_2BYTE, REG_ECX, 1, 2);
91979197
// theEmitter->emitIns_R_S(INS_movzx, EA_2BYTE, REG_EAX, 1, 2);
91989198
theEmitter->emitIns_R_S(INS_cmovo, EA_4BYTE, REG_EAX, 1, 2);
@@ -9224,8 +9224,8 @@ void CodeGen::genAmd64EmitterUnitTestsApx()
92249224

92259225
theEmitter->emitIns_R_R_I(INS_shld, EA_4BYTE, REG_EAX, REG_ECX, 5);
92269226
theEmitter->emitIns_R_R_I(INS_shrd, EA_2BYTE, REG_EAX, REG_ECX, 5);
9227-
// TODO-XArch-apx: S_R_I path only accepts SEE or VEX instructions,
9228-
// so I assuem shld/shrd will not be taking the first argument from stack.
9227+
// TODO-XArch-apx: S_R_I path only accepts SEE or VEX instructions,
9228+
// so I assuem shld/shrd will not be taking the first argument from stack.
92299229
// theEmitter->emitIns_S_R_I(INS_shld, EA_2BYTE, 1, 2, REG_EAX, 5);
92309230
// theEmitter->emitIns_S_R_I(INS_shrd, EA_2BYTE, 1, 2, REG_EAX, 5);
92319231

@@ -9244,7 +9244,6 @@ void CodeGen::genAmd64EmitterUnitTestsApx()
92449244

92459245
theEmitter->emitIns_R(INS_div, EA_8BYTE, REG_EDX);
92469246
theEmitter->emitIns_R(INS_mulEAX, EA_8BYTE, REG_EDX);
9247-
92489247
}
92499248

92509249
#endif // defined(DEBUG) && defined(TARGET_AMD64)

‎src/coreclr/jit/compiler.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2300,8 +2300,8 @@ void Compiler::compSetProcessor()
23002300
if (canUseRex2Encoding() || DoJitStressRex2Encoding())
23012301
{
23022302
// TODO-Xarch-apx:
2303-
// At this stage, since no machine will pass the CPUID check for APX, we need a special stress mode that enables
2304-
// REX2 on incompatible platform, `DoJitStressRex2Encoding` is expected to be removed eventually.
2303+
// At this stage, since no machine will pass the CPUID check for APX, we need a special stress mode that
2304+
// enables REX2 on incompatible platform, `DoJitStressRex2Encoding` is expected to be removed eventually.
23052305
codeGen->GetEmitter()->SetUseRex2Encoding(true);
23062306
}
23072307
}

‎src/coreclr/jit/compiler.h‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -9953,10 +9953,12 @@ class Compiler
99539953
//
99549954
bool canUseRex2Encoding() const
99559955
{
9956-
if(JitConfig.JitBypassAPXCheck())
9956+
#ifdef DEBUG
9957+
if (JitConfig.JitBypassAPXCheck())
99579958
{
99589959
return true;
99599960
}
9961+
#endif // DEBUG
99609962
return compOpportunisticallyDependsOn(InstructionSet_APX);
99619963
}
99629964

@@ -9996,7 +9998,7 @@ class Compiler
99969998
return false;
99979999
}
999810000

9999-
//------------------------------------------------------------------------
10001+
//------------------------------------------------------------------------
1000010002
// DoJitStressRex2Encoding- Answer the question: Do we force REX2 encoding.
1000110003
//
1000210004
// Returns:
@@ -11725,8 +11727,6 @@ class Compiler
1172511727
}
1172611728
#endif // TARGET_XARCH
1172711729

11728-
11729-
1173011730
}; // end of class Compiler
1173111731

1173211732
//---------------------------------------------------------------------------------------------------------------------

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