Skip to content

Commit 4db8b0c

Browse files
committed
Format
1 parent e335e2e commit 4db8b0c

File tree

1 file changed

+3
-5
lines changed

1 file changed

+3
-5
lines changed

src/coreclr/jit/lsra.cpp

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -517,17 +517,15 @@ regMaskTP LinearScan::getConstrainedRegMask(RefPosition* refPosition,
517517
#if defined(TARGET_AMD64)
518518
#ifdef UNIX_AMD64_ABI
519519
// On System V the RDI and RSI are not callee saved. Use R12 ans R13 as callee saved registers.
520-
static const regMaskTP LsraLimitSmallIntSet =
521-
(RBM_EAX | RBM_ECX | RBM_EBX | RBM_ETW_FRAMED_EBP | RBM_R12 | RBM_R13);
520+
static const regMaskTP LsraLimitSmallIntSet = (RBM_EAX | RBM_ECX | RBM_EBX | RBM_ETW_FRAMED_EBP | RBM_R12 | RBM_R13);
522521
#else // !UNIX_AMD64_ABI
523522
// On Windows Amd64 use the RDI and RSI as callee saved registers.
524-
static const regMaskTP LsraLimitSmallIntSet =
525-
(RBM_EAX | RBM_ECX | RBM_EBX | RBM_ETW_FRAMED_EBP | RBM_ESI | RBM_EDI);
523+
static const regMaskTP LsraLimitSmallIntSet = (RBM_EAX | RBM_ECX | RBM_EBX | RBM_ETW_FRAMED_EBP | RBM_ESI | RBM_EDI);
526524
#endif // !UNIX_AMD64_ABI
527525
static const regMaskTP LsraLimitSmallFPSet = (RBM_XMM0 | RBM_XMM1 | RBM_XMM2 | RBM_XMM6 | RBM_XMM7);
528526
static const regMaskTP LsraLimitUpperSimdSet =
529527
(RBM_XMM16 | RBM_XMM17 | RBM_XMM18 | RBM_XMM19 | RBM_XMM20 | RBM_XMM21 | RBM_XMM22 | RBM_XMM23 | RBM_XMM24 |
530-
RBM_XMM25 | RBM_XMM26 | RBM_XMM27 | RBM_XMM28 | RBM_XMM29 | RBM_XMM30 | RBM_XMM31);
528+
RBM_XMM25 | RBM_XMM26 | RBM_XMM27 | RBM_XMM28 | RBM_XMM29 | RBM_XMM30 | RBM_XMM31);
531529
#elif defined(TARGET_ARM)
532530
// On ARM, we may need two registers to set up the target register for a virtual call, so we need
533531
// to have at least the maximum number of arg registers, plus 2.

0 commit comments

Comments
 (0)