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Temp fix for Android NDK REG_* conflicts (#111681)
1 parent fd652ab commit 4bb0bcd

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4 files changed

+470
-6
lines changed

4 files changed

+470
-6
lines changed

src/coreclr/jit/register.h

Lines changed: 172 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -133,6 +133,178 @@ REGDEF(K7, 7+KBASE, KMASK(7), "k7" )
133133

134134
REGDEF(STK, 8+KBASE, 0x0000, "STK" )
135135

136+
// Ignore REG_* symbols defined in Android NDK
137+
#if defined(TARGET_X86)
138+
#undef REG_EAX
139+
#define REG_EAX JITREG_EAX
140+
#undef REG_ECX
141+
#define REG_ECX JITREG_ECX
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#undef REG_EDX
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#define REG_EDX JITREG_EDX
144+
#undef REG_EBX
145+
#define REG_EBX JITREG_EBX
146+
#undef REG_ESP
147+
#define REG_ESP JITREG_ESP
148+
#undef REG_EBP
149+
#define REG_EBP JITREG_EBP
150+
#undef REG_ESI
151+
#define REG_ESI JITREG_ESI
152+
#undef REG_EDI
153+
#define REG_EDI JITREG_EDI
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#undef REG_RAX
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#define REG_RAX JITREG_RAX
156+
#undef REG_RCX
157+
#define REG_RCX JITREG_RCX
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#undef REG_RDX
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#define REG_RDX JITREG_RDX
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#undef REG_RBX
161+
#define REG_RBX JITREG_RBX
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#undef REG_RSP
163+
#define REG_RSP JITREG_RSP
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#undef REG_RBP
165+
#define REG_RBP JITREG_RBP
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#undef REG_RSI
167+
#define REG_RSI JITREG_RSI
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#undef REG_RDI
169+
#define REG_RDI JITREG_RDI
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#else // defined(TARGET_X86)
171+
#undef REG_RAX
172+
#define REG_RAX JITREG_RAX
173+
#undef REG_RCX
174+
#define REG_RCX JITREG_RCX
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#undef REG_RDX
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#define REG_RDX JITREG_RDX
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#undef REG_RBX
178+
#define REG_RBX JITREG_RBX
179+
#undef REG_RSP
180+
#define REG_RSP JITREG_RSP
181+
#undef REG_RBP
182+
#define REG_RBP JITREG_RBP
183+
#undef REG_RSI
184+
#define REG_RSI JITREG_RSI
185+
#undef REG_RDI
186+
#define REG_RDI JITREG_RDI
187+
#undef REG_R8
188+
#define REG_R8 JITREG_R8
189+
#undef REG_R9
190+
#define REG_R9 JITREG_R9
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#undef REG_R10
192+
#define REG_R10 JITREG_R10
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#undef REG_R11
194+
#define REG_R11 JITREG_R11
195+
#undef REG_R12
196+
#define REG_R12 JITREG_R12
197+
#undef REG_R13
198+
#define REG_R13 JITREG_R13
199+
#undef REG_R14
200+
#define REG_R14 JITREG_R14
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#undef REG_R15
202+
#define REG_R15 JITREG_R15
203+
#undef REG_EAX
204+
#define REG_EAX JITREG_EAX
205+
#undef REG_ECX
206+
#define REG_ECX JITREG_ECX
207+
#undef REG_EDX
208+
#define REG_EDX JITREG_EDX
209+
#undef REG_EBX
210+
#define REG_EBX JITREG_EBX
211+
#undef REG_ESP
212+
#define REG_ESP JITREG_ESP
213+
#undef REG_EBP
214+
#define REG_EBP JITREG_EBP
215+
#undef REG_ESI
216+
#define REG_ESI JITREG_ESI
217+
#undef REG_EDI
218+
#define REG_EDI JITREG_EDI
219+
#endif // !defined(TARGET_X86)
220+
221+
#undef REG_XMM0
222+
#define REG_XMM0 JITREG_XMM0
223+
#undef REG_XMM1
224+
#define REG_XMM1 JITREG_XMM1
225+
#undef REG_XMM2
226+
#define REG_XMM2 JITREG_XMM2
227+
#undef REG_XMM3
228+
#define REG_XMM3 JITREG_XMM3
229+
#undef REG_XMM4
230+
#define REG_XMM4 JITREG_XMM4
231+
#undef REG_XMM5
232+
#define REG_XMM5 JITREG_XMM5
233+
#undef REG_XMM6
234+
#define REG_XMM6 JITREG_XMM6
235+
#undef REG_XMM7
236+
#define REG_XMM7 JITREG_XMM7
237+
238+
#ifdef TARGET_AMD64
239+
#undef REG_XMM8
240+
#define REG_XMM8 JITREG_XMM8
241+
#undef REG_XMM9
242+
#define REG_XMM9 JITREG_XMM9
243+
#undef REG_XMM10
244+
#define REG_XMM10 JITREG_XMM10
245+
#undef REG_XMM11
246+
#define REG_XMM11 JITREG_XMM11
247+
#undef REG_XMM12
248+
#define REG_XMM12 JITREG_XMM12
249+
#undef REG_XMM13
250+
#define REG_XMM13 JITREG_XMM13
251+
#undef REG_XMM14
252+
#define REG_XMM14 JITREG_XMM14
253+
#undef REG_XMM15
254+
#define REG_XMM15 JITREG_XMM15
255+
#undef REG_XMM16
256+
#define REG_XMM16 JITREG_XMM16
257+
#undef REG_XMM17
258+
#define REG_XMM17 JITREG_XMM17
259+
#undef REG_XMM18
260+
#define REG_XMM18 JITREG_XMM18
261+
#undef REG_XMM19
262+
#define REG_XMM19 JITREG_XMM19
263+
#undef REG_XMM20
264+
#define REG_XMM20 JITREG_XMM20
265+
#undef REG_XMM21
266+
#define REG_XMM21 JITREG_XMM21
267+
#undef REG_XMM22
268+
#define REG_XMM22 JITREG_XMM22
269+
#undef REG_XMM23
270+
#define REG_XMM23 JITREG_XMM23
271+
#undef REG_XMM24
272+
#define REG_XMM24 JITREG_XMM24
273+
#undef REG_XMM25
274+
#define REG_XMM25 JITREG_XMM25
275+
#undef REG_XMM26
276+
#define REG_XMM26 JITREG_XMM26
277+
#undef REG_XMM27
278+
#define REG_XMM27 JITREG_XMM27
279+
#undef REG_XMM28
280+
#define REG_XMM28 JITREG_XMM28
281+
#undef REG_XMM29
282+
#define REG_XMM29 JITREG_XMM29
283+
#undef REG_XMM30
284+
#define REG_XMM30 JITREG_XMM30
285+
#undef REG_XMM31
286+
#define REG_XMM31 JITREG_XMM31
287+
#endif // TARGET_AMD64
288+
289+
#undef REG_K0
290+
#define REG_K0 JITREG_K0
291+
#undef REG_K1
292+
#define REG_K1 JITREG_K1
293+
#undef REG_K2
294+
#define REG_K2 JITREG_K2
295+
#undef REG_K3
296+
#define REG_K3 JITREG_K3
297+
#undef REG_K4
298+
#define REG_K4 JITREG_K4
299+
#undef REG_K5
300+
#define REG_K5 JITREG_K5
301+
#undef REG_K6
302+
#define REG_K6 JITREG_K6
303+
#undef REG_K7
304+
#define REG_K7 JITREG_K7
305+
#undef REG_STK
306+
#define REG_STK JITREG_STK
307+
136308
#elif defined(TARGET_ARM)
137309
#include "registerarm.h"
138310

src/coreclr/jit/registerarm.h

Lines changed: 108 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -74,6 +74,114 @@ REGALIAS(R13, SP)
7474
REGALIAS(R14, LR)
7575
REGALIAS(R15, PC)
7676

77+
// Ignore REG_* symbols defined in Android NDK
78+
#undef REG_R0
79+
#define REG_R0 JITREG_R0
80+
#undef REG_R1
81+
#define REG_R1 JITREG_R1
82+
#undef REG_R2
83+
#define REG_R2 JITREG_R2
84+
#undef REG_R3
85+
#define REG_R3 JITREG_R3
86+
#undef REG_R4
87+
#define REG_R4 JITREG_R4
88+
#undef REG_R5
89+
#define REG_R5 JITREG_R5
90+
#undef REG_R6
91+
#define REG_R6 JITREG_R6
92+
#undef REG_R7
93+
#define REG_R7 JITREG_R7
94+
#undef REG_R8
95+
#define REG_R8 JITREG_R8
96+
#undef REG_R9
97+
#define REG_R9 JITREG_R9
98+
#undef REG_R10
99+
#define REG_R10 JITREG_R10
100+
#undef REG_R11
101+
#define REG_R11 JITREG_R11
102+
#undef REG_R12
103+
#define REG_R12 JITREG_R12
104+
#undef REG_SP
105+
#define REG_SP JITREG_SP
106+
#undef REG_LR
107+
#define REG_LR JITREG_LR
108+
#undef REG_PC
109+
#define REG_PC JITREG_PC
110+
#undef REG_F0
111+
#define REG_F0 JITREG_F0
112+
#undef REG_F1
113+
#define REG_F1 JITREG_F1
114+
#undef REG_F2
115+
#define REG_F2 JITREG_F2
116+
#undef REG_F3
117+
#define REG_F3 JITREG_F3
118+
#undef REG_F4
119+
#define REG_F4 JITREG_F4
120+
#undef REG_F5
121+
#define REG_F5 JITREG_F5
122+
#undef REG_F6
123+
#define REG_F6 JITREG_F6
124+
#undef REG_F7
125+
#define REG_F7 JITREG_F7
126+
#undef REG_F8
127+
#define REG_F8 JITREG_F8
128+
#undef REG_F9
129+
#define REG_F9 JITREG_F9
130+
#undef REG_F10
131+
#define REG_F10 JITREG_F10
132+
#undef REG_F11
133+
#define REG_F11 JITREG_F11
134+
#undef REG_F12
135+
#define REG_F12 JITREG_F12
136+
#undef REG_F13
137+
#define REG_F13 JITREG_F13
138+
#undef REG_F14
139+
#define REG_F14 JITREG_F14
140+
#undef REG_F15
141+
#define REG_F15 JITREG_F15
142+
#undef REG_F16
143+
#define REG_F16 JITREG_F16
144+
#undef REG_F17
145+
#define REG_F17 JITREG_F17
146+
#undef REG_F18
147+
#define REG_F18 JITREG_F18
148+
#undef REG_F19
149+
#define REG_F19 JITREG_F19
150+
#undef REG_F20
151+
#define REG_F20 JITREG_F20
152+
#undef REG_F21
153+
#define REG_F21 JITREG_F21
154+
#undef REG_F22
155+
#define REG_F22 JITREG_F22
156+
#undef REG_F23
157+
#define REG_F23 JITREG_F23
158+
#undef REG_F24
159+
#define REG_F24 JITREG_F24
160+
#undef REG_F25
161+
#define REG_F25 JITREG_F25
162+
#undef REG_F26
163+
#define REG_F26 JITREG_F26
164+
#undef REG_F27
165+
#define REG_F27 JITREG_F27
166+
#undef REG_F28
167+
#define REG_F28 JITREG_F28
168+
#undef REG_F29
169+
#define REG_F29 JITREG_F29
170+
#undef REG_F30
171+
#define REG_F30 JITREG_F30
172+
#undef REG_F31
173+
#define REG_F31 JITREG_F31
174+
#undef REG_FP
175+
#define REG_FP JITREG_FP
176+
#undef REG_R13
177+
#define REG_R13 JITREG_R13
178+
#undef REG_R14
179+
#define REG_R14 JITREG_R14
180+
#undef REG_R15
181+
#define REG_R15 JITREG_R15
182+
#undef REG_STK
183+
#define REG_STK JITREG_STK
184+
77185
// This must be last!
78186
REGDEF(STK, 32+FPBASE, 0x0000, "STK")
79187

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