Cleanup some cases found by SPMI

tannergooding · tannergooding · commit 40ffaa3c2076 · 2024-05-07T10:54:22.000-07:00
diff --git a/src/coreclr/jit/emitxarch.cpp b/src/coreclr/jit/emitxarch.cpp
@@ -10948,7 +10948,7 @@ void emitter::emitDispInsHex(instrDesc* id, BYTE* code, size_t sz)
 //
 void emitter::emitDispEmbBroadcastCount(instrDesc* id) const
 {
-    if (!IsAvx512OrPriorInstruction(id->idIns()) || !id->idIsEvexbContextSet())
+    if (!IsEvexEncodableInstruction(id->idIns()) || !id->idIsEvexbContextSet())
     {
         return;
     }
@@ -10995,7 +10995,7 @@ void emitter::emitDispEmbRounding(instrDesc* id) const
 //
 void emitter::emitDispEmbMasking(instrDesc* id) const
 {
-    if (!IsAvx512OrPriorInstruction(id->idIns()))
+    if (!IsEvexEncodableInstruction(id->idIns()))
     {
         return;
     }
@@ -11215,7 +11215,7 @@ void emitter::emitDispIns(
 
         case IF_CNS:
         {
-            assert(!IsAvx512OrPriorInstruction(id->idIns()));
+            assert(!IsEvexEncodableInstruction(id->idIns()));
 
             val = emitGetInsSC(id);
 #ifdef TARGET_AMD64
@@ -11260,7 +11260,7 @@ void emitter::emitDispIns(
         case IF_AWR:
         case IF_ARW:
         {
-            assert(!IsAvx512OrPriorInstruction(id->idIns()));
+            assert(!IsEvexEncodableInstruction(id->idIns()));
 
             if (((ins == INS_call) || (ins == INS_tail_i_jmp)) && id->idIsCallRegPtr())
             {
@@ -11554,7 +11554,7 @@ void emitter::emitDispIns(
         case IF_SWR:
         case IF_SRW:
         {
-            assert(!IsAvx512OrPriorInstruction(id->idIns()));
+            assert(!IsEvexEncodableInstruction(id->idIns()));
             printf("%s", sstr);
 
 #if !FEATURE_FIXED_OUT_ARGS
@@ -12106,7 +12106,7 @@ void emitter::emitDispIns(
         case IF_RWR:
         case IF_RRW:
         {
-            assert(!IsAvx512OrPriorInstruction(id->idIns()));
+            assert(!IsEvexEncodableInstruction(id->idIns()));
             printf("%s", emitRegName(id->idReg1(), attr));
             emitDispShift(ins);
             break;
@@ -12317,7 +12317,7 @@ void emitter::emitDispIns(
 
         case IF_RWR_MRD_OFF:
         {
-            assert(!IsAvx512OrPriorInstruction(id->idIns()));
+            assert(!IsEvexEncodableInstruction(id->idIns()));
             printf("%s, %s", emitRegName(id->idReg1(), attr), "offset");
             offs = emitGetInsDsp(id);
             emitDispClsVar(id->idAddr()->iiaFieldHnd, offs, ID_INFO_DSP_RELOC);
@@ -12372,7 +12372,7 @@ void emitter::emitDispIns(
         case IF_MWR:
         case IF_MRW:
         {
-            assert(!IsAvx512OrPriorInstruction(id->idIns()));
+            assert(!IsEvexEncodableInstruction(id->idIns()));
             printf("%s", sstr);
             offs = emitGetInsDsp(id);
             emitDispClsVar(id->idAddr()->iiaFieldHnd, offs, ID_INFO_DSP_RELOC);
@@ -12382,7 +12382,7 @@ void emitter::emitDispIns(
 
         case IF_MRD_OFF:
         {
-            assert(!IsAvx512OrPriorInstruction(id->idIns()));
+            assert(!IsEvexEncodableInstruction(id->idIns()));
             printf("offset ");
             offs = emitGetInsDsp(id);
             emitDispClsVar(id->idAddr()->iiaFieldHnd, offs, ID_INFO_DSP_RELOC);
@@ -12417,7 +12417,7 @@ void emitter::emitDispIns(
         case IF_RWR_LABEL:
         case IF_SWR_LABEL:
         {
-            assert(!IsAvx512OrPriorInstruction(id->idIns()));
+            assert(!IsEvexEncodableInstruction(id->idIns()));
 
             if (ins == INS_lea)
             {
@@ -12460,7 +12460,7 @@ void emitter::emitDispIns(
         case IF_METHOD:
         case IF_METHPTR:
         {
-            assert(!IsAvx512OrPriorInstruction(id->idIns()));
+            assert(!IsEvexEncodableInstruction(id->idIns()));
             methodName = emitComp->eeGetMethodFullName((CORINFO_METHOD_HANDLE)id->idDebugOnlyInfo()->idMemCookie);
 
             if (id->idInsFmt() == IF_METHPTR)
diff --git a/src/coreclr/jit/hwintrinsicxarch.cpp b/src/coreclr/jit/hwintrinsicxarch.cpp
@@ -302,6 +302,7 @@ int HWIntrinsicInfo::lookupImmUpperBound(NamedIntrinsic id)
         case NI_AVX_Compare:
         case NI_AVX_CompareScalar:
         case NI_AVX512F_Compare:
+        case NI_AVX512F_CompareMask:
         {
             assert(!HWIntrinsicInfo::HasFullRangeImm(id));
             return 31; // enum FloatComparisonMode has 32 values
diff --git a/src/coreclr/jit/lowerxarch.cpp b/src/coreclr/jit/lowerxarch.cpp
@@ -3101,7 +3101,13 @@ GenTree* Lowering::LowerHWIntrinsicTernaryLogic(GenTreeHWIntrinsic* node)
                     }
                 }
 
-                if (!varTypeIsMask(condition))
+                if (condition->OperIsHWIntrinsic(NI_AVX512F_ConvertMaskToVector))
+                {
+                    GenTree* tmp = condition->AsHWIntrinsic()->Op(1);
+                    BlockRange().Remove(condition);
+                    condition = tmp;
+                }
+                else if (!varTypeIsMask(condition))
                 {
                     if (!condition->OperIsHWIntrinsic())
                     {
@@ -3224,22 +3230,21 @@ GenTree* Lowering::LowerHWIntrinsicTernaryLogic(GenTreeHWIntrinsic* node)
                         default:
                         {
                             assert(!HWIntrinsicInfo::ReturnsPerElementMask(cndId));
+                            cndId = NI_Illegal;
                             break;
                         }
                     }
 
+                    if (cndId == NI_Illegal)
+                    {
+                        break;
+                    }
+
                     cndNode->gtType = TYP_MASK;
                     cndNode->ChangeHWIntrinsicId(cndId);
                 }
 
-                if (condition->OperIsHWIntrinsic(NI_AVX512F_ConvertMaskToVector))
-                {
-                    GenTree* tmp = condition->AsHWIntrinsic()->Op(1);
-                    BlockRange().Remove(condition);
-                    condition = tmp;
-                    break;
-                }
-
+                assert(varTypeIsMask(condition));
                 node->ResetHWIntrinsicId(NI_AVX512F_BlendVariableMask, comp, selectFalse, selectTrue, condition);
                 BlockRange().Remove(op4);
                 break;
@@ -8511,6 +8516,7 @@ bool Lowering::IsContainableHWIntrinsicOp(GenTreeHWIntrinsic* parentNode, GenTre
                 case NI_AVX2_ShuffleLow:
                 case NI_AVX512F_AlignRight32:
                 case NI_AVX512F_AlignRight64:
+                case NI_AVX512F_CompareMask:
                 case NI_AVX512F_Fixup:
                 case NI_AVX512F_GetMantissa:
                 case NI_AVX512F_Permute2x64:
@@ -9073,12 +9079,12 @@ void Lowering::TryFoldCnsVecForEmbeddedBroadcast(GenTreeHWIntrinsic* parentNode,
     CorInfoType simdBaseJitType     = parentNode->GetSimdBaseJitType();
     unsigned    simdSize            = parentNode->GetSimdSize();
     bool        isCreatedFromScalar = true;
-    int         elementCount        = GenTreeVecCon::ElementCount(genTypeSize(simdType), simdBaseType);
 
     if (simdType == TYP_MASK)
     {
         simdType = Compiler::getSIMDTypeForSize(simdSize);
     }
+    int elementCount = GenTreeVecCon::ElementCount(genTypeSize(simdType), simdBaseType);
 
     switch (simdBaseType)
     {
@@ -10449,6 +10455,7 @@ void Lowering::ContainCheckHWIntrinsic(GenTreeHWIntrinsic* node)
                         case NI_AVX2_Permute2x128:
                         case NI_AVX512F_AlignRight32:
                         case NI_AVX512F_AlignRight64:
+                        case NI_AVX512F_CompareMask:
                         case NI_AVX512F_GetMantissaScalar:
                         case NI_AVX512F_InsertVector128:
                         case NI_AVX512F_InsertVector256:
diff --git a/src/coreclr/jit/lsrabuild.cpp b/src/coreclr/jit/lsrabuild.cpp
@@ -3605,7 +3605,7 @@ int LinearScan::BuildDelayFreeUses(GenTree*      node,
     else if (node->OperIsHWIntrinsic())
     {
         assert(node->AsHWIntrinsic()->GetOperandCount() == 1);
-        use = BuildUse(node->AsHWIntrinsic()->Op(1), candidates);
+        return BuildDelayFreeUses(node->AsHWIntrinsic()->Op(1), rmwNode, candidates, useRefPositionRef);
     }
 #endif
     else if (!node->OperIsIndir())
diff --git a/src/coreclr/jit/lsraxarch.cpp b/src/coreclr/jit/lsraxarch.cpp
@@ -2543,7 +2543,7 @@ int LinearScan::BuildHWIntrinsic(GenTreeHWIntrinsic* intrinsicTree, int* pDstCou
 
                         for (GenTree* operand : op2->AsHWIntrinsic()->Operands())
                         {
-                            assert(varTypeIsSIMD(operand));
+                            assert(varTypeIsSIMD(operand) || varTypeIsInt(operand));
                             srcCount += BuildDelayFreeUses(operand, op1);
                         }
                     }
@@ -2556,7 +2556,7 @@ int LinearScan::BuildHWIntrinsic(GenTreeHWIntrinsic* intrinsicTree, int* pDstCou
 
                         for (GenTree* operand : op2->AsHWIntrinsic()->Operands())
                         {
-                            assert(varTypeIsSIMD(operand));
+                            assert(varTypeIsSIMD(operand) || varTypeIsInt(operand));
                             srcCount += BuildOperandUses(operand);
                         }
                     }

Original file line number	Diff line number	Diff line change
`@@ -10948,7 +10948,7 @@ void emitter::emitDispInsHex(instrDesc* id, BYTE* code, size_t sz)`
`10948`	`10948`	`//`
`10949`	`10949`	`void emitter::emitDispEmbBroadcastCount(instrDesc* id) const`
`10950`	`10950`	`{`
`10951`		`- if (!IsAvx512OrPriorInstruction(id->idIns()) \|\| !id->idIsEvexbContextSet())`
	`10951`	`+ if (!IsEvexEncodableInstruction(id->idIns()) \|\| !id->idIsEvexbContextSet())`
`10952`	`10952`	`{`
`10953`	`10953`	`return;`
`10954`	`10954`	`}`
`@@ -10995,7 +10995,7 @@ void emitter::emitDispEmbRounding(instrDesc* id) const`
`10995`	`10995`	`//`
`10996`	`10996`	`void emitter::emitDispEmbMasking(instrDesc* id) const`
`10997`	`10997`	`{`
`10998`		`- if (!IsAvx512OrPriorInstruction(id->idIns()))`
	`10998`	`+ if (!IsEvexEncodableInstruction(id->idIns()))`
`10999`	`10999`	`{`
`11000`	`11000`	`return;`
`11001`	`11001`	`}`
`@@ -11215,7 +11215,7 @@ void emitter::emitDispIns(`
`11215`	`11215`
`11216`	`11216`	`case IF_CNS:`
`11217`	`11217`	`{`
`11218`		`- assert(!IsAvx512OrPriorInstruction(id->idIns()));`
	`11218`	`+ assert(!IsEvexEncodableInstruction(id->idIns()));`
`11219`	`11219`
`11220`	`11220`	`val = emitGetInsSC(id);`
`11221`	`11221`	`#ifdef TARGET_AMD64`
`@@ -11260,7 +11260,7 @@ void emitter::emitDispIns(`
`11260`	`11260`	`case IF_AWR:`
`11261`	`11261`	`case IF_ARW:`
`11262`	`11262`	`{`
`11263`		`- assert(!IsAvx512OrPriorInstruction(id->idIns()));`
	`11263`	`+ assert(!IsEvexEncodableInstruction(id->idIns()));`
`11264`	`11264`
`11265`	`11265`	`if (((ins == INS_call) \|\| (ins == INS_tail_i_jmp)) && id->idIsCallRegPtr())`
`11266`	`11266`	`{`
`@@ -11554,7 +11554,7 @@ void emitter::emitDispIns(`
`11554`	`11554`	`case IF_SWR:`
`11555`	`11555`	`case IF_SRW:`
`11556`	`11556`	`{`
`11557`		`- assert(!IsAvx512OrPriorInstruction(id->idIns()));`
	`11557`	`+ assert(!IsEvexEncodableInstruction(id->idIns()));`
`11558`	`11558`	`printf("%s", sstr);`
`11559`	`11559`
`11560`	`11560`	`#if !FEATURE_FIXED_OUT_ARGS`
`@@ -12106,7 +12106,7 @@ void emitter::emitDispIns(`
`12106`	`12106`	`case IF_RWR:`
`12107`	`12107`	`case IF_RRW:`
`12108`	`12108`	`{`
`12109`		`- assert(!IsAvx512OrPriorInstruction(id->idIns()));`
	`12109`	`+ assert(!IsEvexEncodableInstruction(id->idIns()));`
`12110`	`12110`	`printf("%s", emitRegName(id->idReg1(), attr));`
`12111`	`12111`	`emitDispShift(ins);`
`12112`	`12112`	`break;`
`@@ -12317,7 +12317,7 @@ void emitter::emitDispIns(`
`12317`	`12317`
`12318`	`12318`	`case IF_RWR_MRD_OFF:`
`12319`	`12319`	`{`
`12320`		`- assert(!IsAvx512OrPriorInstruction(id->idIns()));`
	`12320`	`+ assert(!IsEvexEncodableInstruction(id->idIns()));`
`12321`	`12321`	`printf("%s, %s", emitRegName(id->idReg1(), attr), "offset");`
`12322`	`12322`	`offs = emitGetInsDsp(id);`
`12323`	`12323`	`emitDispClsVar(id->idAddr()->iiaFieldHnd, offs, ID_INFO_DSP_RELOC);`
`@@ -12372,7 +12372,7 @@ void emitter::emitDispIns(`
`12372`	`12372`	`case IF_MWR:`
`12373`	`12373`	`case IF_MRW:`
`12374`	`12374`	`{`
`12375`		`- assert(!IsAvx512OrPriorInstruction(id->idIns()));`
	`12375`	`+ assert(!IsEvexEncodableInstruction(id->idIns()));`
`12376`	`12376`	`printf("%s", sstr);`
`12377`	`12377`	`offs = emitGetInsDsp(id);`
`12378`	`12378`	`emitDispClsVar(id->idAddr()->iiaFieldHnd, offs, ID_INFO_DSP_RELOC);`
`@@ -12382,7 +12382,7 @@ void emitter::emitDispIns(`
`12382`	`12382`
`12383`	`12383`	`case IF_MRD_OFF:`
`12384`	`12384`	`{`
`12385`		`- assert(!IsAvx512OrPriorInstruction(id->idIns()));`
	`12385`	`+ assert(!IsEvexEncodableInstruction(id->idIns()));`
`12386`	`12386`	`printf("offset ");`
`12387`	`12387`	`offs = emitGetInsDsp(id);`
`12388`	`12388`	`emitDispClsVar(id->idAddr()->iiaFieldHnd, offs, ID_INFO_DSP_RELOC);`
`@@ -12417,7 +12417,7 @@ void emitter::emitDispIns(`
`12417`	`12417`	`case IF_RWR_LABEL:`
`12418`	`12418`	`case IF_SWR_LABEL:`
`12419`	`12419`	`{`
`12420`		`- assert(!IsAvx512OrPriorInstruction(id->idIns()));`
	`12420`	`+ assert(!IsEvexEncodableInstruction(id->idIns()));`
`12421`	`12421`
`12422`	`12422`	`if (ins == INS_lea)`
`12423`	`12423`	`{`
`@@ -12460,7 +12460,7 @@ void emitter::emitDispIns(`
`12460`	`12460`	`case IF_METHOD:`
`12461`	`12461`	`case IF_METHPTR:`
`12462`	`12462`	`{`
`12463`		`- assert(!IsAvx512OrPriorInstruction(id->idIns()));`
	`12463`	`+ assert(!IsEvexEncodableInstruction(id->idIns()));`
`12464`	`12464`	`methodName = emitComp->eeGetMethodFullName((CORINFO_METHOD_HANDLE)id->idDebugOnlyInfo()->idMemCookie);`
`12465`	`12465`
`12466`	`12466`	`if (id->idInsFmt() == IF_METHPTR)`
Original file line number	Diff line number	Diff line change
`@@ -302,6 +302,7 @@ int HWIntrinsicInfo::lookupImmUpperBound(NamedIntrinsic id)`
`302`	`302`	`case NI_AVX_Compare:`
`303`	`303`	`case NI_AVX_CompareScalar:`
`304`	`304`	`case NI_AVX512F_Compare:`
	`305`	`+ case NI_AVX512F_CompareMask:`
`305`	`306`	`{`
`306`	`307`	`assert(!HWIntrinsicInfo::HasFullRangeImm(id));`
`307`	`308`	`return 31; // enum FloatComparisonMode has 32 values`
Original file line number	Diff line number	Diff line change
`@@ -3605,7 +3605,7 @@ int LinearScan::BuildDelayFreeUses(GenTree* node,`
`3605`	`3605`	`else if (node->OperIsHWIntrinsic())`
`3606`	`3606`	`{`
`3607`	`3607`	`assert(node->AsHWIntrinsic()->GetOperandCount() == 1);`
`3608`		`- use = BuildUse(node->AsHWIntrinsic()->Op(1), candidates);`
	`3608`	`+ return BuildDelayFreeUses(node->AsHWIntrinsic()->Op(1), rmwNode, candidates, useRefPositionRef);`
`3609`	`3609`	`}`
`3610`	`3610`	`#endif`
`3611`	`3611`	`else if (!node->OperIsIndir())`
Original file line number	Diff line number	Diff line change
`@@ -2543,7 +2543,7 @@ int LinearScan::BuildHWIntrinsic(GenTreeHWIntrinsic* intrinsicTree, int* pDstCou`
`2543`	`2543`
`2544`	`2544`	`for (GenTree* operand : op2->AsHWIntrinsic()->Operands())`
`2545`	`2545`	`{`
`2546`		`- assert(varTypeIsSIMD(operand));`
	`2546`	`+ assert(varTypeIsSIMD(operand) \|\| varTypeIsInt(operand));`
`2547`	`2547`	`srcCount += BuildDelayFreeUses(operand, op1);`
`2548`	`2548`	`}`
`2549`	`2549`	`}`
`@@ -2556,7 +2556,7 @@ int LinearScan::BuildHWIntrinsic(GenTreeHWIntrinsic* intrinsicTree, int* pDstCou`
`2556`	`2556`
`2557`	`2557`	`for (GenTree* operand : op2->AsHWIntrinsic()->Operands())`
`2558`	`2558`	`{`
`2559`		`- assert(varTypeIsSIMD(operand));`
	`2559`	`+ assert(varTypeIsSIMD(operand) \|\| varTypeIsInt(operand));`
`2560`	`2560`	`srcCount += BuildOperandUses(operand);`
`2561`	`2561`	`}`
`2562`	`2562`	`}`