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Add SVE2 API skeleton and implement BitwiseClearXor (#115428)
* Add SVE2 API skeleton and implement BitwiseClearXor * Add missing movprfx case
1 parent 01e5fa1 commit 3104b88

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14 files changed

+286
-3
lines changed

14 files changed

+286
-3
lines changed

‎src/coreclr/jit/hwintrinsic.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -857,7 +857,7 @@ static const HWIntrinsicIsaRange hwintrinsicIsaRangeArray[] = {
857857
{ NI_Illegal, NI_Illegal }, // VectorT128
858858
{ NI_Illegal, NI_Illegal }, // Rcpc2
859859
{ FIRST_NI_Sve, LAST_NI_Sve },
860-
{ NI_Illegal, NI_Illegal }, // Sve2
860+
{ FIRST_NI_Sve2, LAST_NI_Sve2 }, // Sve2
861861
{ FIRST_NI_ArmBase_Arm64, LAST_NI_ArmBase_Arm64 },
862862
{ FIRST_NI_AdvSimd_Arm64, LAST_NI_AdvSimd_Arm64 },
863863
{ NI_Illegal, NI_Illegal }, // Aes_Arm64

‎src/coreclr/jit/hwintrinsiccodegenarm64.cpp‎

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2649,6 +2649,16 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
26492649
break;
26502650
}
26512651

2652+
case NI_Sve2_BitwiseClearXor:
2653+
if (targetReg != op1Reg)
2654+
{
2655+
assert(targetReg != op2Reg);
2656+
GetEmitter()->emitInsSve_R_R(INS_sve_movprfx, EA_SCALABLE, targetReg, op1Reg);
2657+
}
2658+
// Always use the lane size D. It's a bitwise operation so this is fine for all integer vector types.
2659+
GetEmitter()->emitInsSve_R_R_R(ins, emitSize, targetReg, op2Reg, op3Reg, INS_OPTS_SCALABLE_D);
2660+
break;
2661+
26522662
default:
26532663
unreached();
26542664
}

‎src/coreclr/jit/hwintrinsiclistarm64sve.h‎

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -307,8 +307,16 @@ HARDWARE_INTRINSIC(Sve, ZipLow,
307307
// ISA Function name SIMD size NumArg Instructions Category Flags
308308
// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
309309
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
310-
// Special intrinsics that are generated during importing or lowering
310+
// SVE2 Intrinsics
311+
#define FIRST_NI_Sve2 NI_Sve2_BitwiseClearXor
312+
HARDWARE_INTRINSIC(Sve2, BitwiseClearXor, -1, 3, {INS_sve_bcax, INS_sve_bcax, INS_sve_bcax, INS_sve_bcax, INS_sve_bcax, INS_sve_bcax, INS_sve_bcax, INS_sve_bcax, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_HasRMWSemantics)
313+
#define LAST_NI_Sve2 NI_Sve2_BitwiseClearXor
311314

315+
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
316+
// ISA Function name SIMD size NumArg Instructions Category Flags
317+
// {TYP_BYTE, TYP_UBYTE, TYP_SHORT, TYP_USHORT, TYP_INT, TYP_UINT, TYP_LONG, TYP_ULONG, TYP_FLOAT, TYP_DOUBLE}
318+
// ***************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************************
319+
// Special intrinsics that are generated during importing or lowering
312320
#define SPECIAL_NI_Sve NI_Sve_ConditionalExtractAfterLastActiveElementScalar
313321
HARDWARE_INTRINSIC(Sve, ConditionalExtractAfterLastActiveElementScalar, 0, 3, {INS_sve_clasta, INS_sve_clasta, INS_sve_clasta, INS_sve_clasta, INS_sve_clasta, INS_sve_clasta, INS_sve_clasta, INS_sve_clasta, INS_sve_clasta, INS_sve_clasta}, HW_Category_Scalar, HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_HasRMWSemantics|HW_Flag_ExplicitMaskedOperation|HW_Flag_LowMaskedOperation)
314322
HARDWARE_INTRINSIC(Sve, ConditionalExtractLastActiveElementScalar, 0, 3, {INS_sve_clastb, INS_sve_clastb, INS_sve_clastb, INS_sve_clastb, INS_sve_clastb, INS_sve_clastb, INS_sve_clastb, INS_sve_clastb, INS_sve_clastb, INS_sve_clastb}, HW_Category_Scalar, HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_HasRMWSemantics|HW_Flag_ExplicitMaskedOperation|HW_Flag_LowMaskedOperation)
@@ -326,7 +334,6 @@ HARDWARE_INTRINSIC(Sve, StoreAndZipx2,
326334
HARDWARE_INTRINSIC(Sve, StoreAndZipx3, -1, 3, {INS_sve_st3b, INS_sve_st3b, INS_sve_st3h, INS_sve_st3h, INS_sve_st3w, INS_sve_st3w, INS_sve_st3d, INS_sve_st3d, INS_sve_st3w, INS_sve_st3d}, HW_Category_MemoryStore, HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_ExplicitMaskedOperation|HW_Flag_LowMaskedOperation|HW_Flag_NeedsConsecutiveRegisters)
327335
HARDWARE_INTRINSIC(Sve, StoreAndZipx4, -1, 3, {INS_sve_st4b, INS_sve_st4b, INS_sve_st4h, INS_sve_st4h, INS_sve_st4w, INS_sve_st4w, INS_sve_st4d, INS_sve_st4d, INS_sve_st4w, INS_sve_st4d}, HW_Category_MemoryStore, HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_ExplicitMaskedOperation|HW_Flag_LowMaskedOperation|HW_Flag_NeedsConsecutiveRegisters)
328336

329-
330337
#endif // FEATURE_HW_INTRINSIC
331338

332339
#undef HARDWARE_INTRINSIC

‎src/libraries/System.Private.CoreLib/src/ILLink/ILLink.Substitutions.NoArmIntrinsics.xml‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -57,5 +57,11 @@
5757
<type fullname="System.Runtime.Intrinsics.Arm.Sve/Arm64">
5858
<method signature="System.Boolean get_IsSupported()" body="stub" value="false" />
5959
</type>
60+
<type fullname="System.Runtime.Intrinsics.Arm.Sve2">
61+
<method signature="System.Boolean get_IsSupported()" body="stub" value="false" />
62+
</type>
63+
<type fullname="System.Runtime.Intrinsics.Arm.Sve2/Arm64">
64+
<method signature="System.Boolean get_IsSupported()" body="stub" value="false" />
65+
</type>
6066
</assembly>
6167
</linker>

‎src/libraries/System.Private.CoreLib/src/System.Private.CoreLib.Shared.projitems‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2724,6 +2724,7 @@
27242724
<Compile Include="$(MSBuildThisFileDirectory)System\Runtime\Intrinsics\Arm\Sha1.cs" />
27252725
<Compile Include="$(MSBuildThisFileDirectory)System\Runtime\Intrinsics\Arm\Sha256.cs" />
27262726
<Compile Include="$(MSBuildThisFileDirectory)System\Runtime\Intrinsics\Arm\Sve.cs" />
2727+
<Compile Include="$(MSBuildThisFileDirectory)System\Runtime\Intrinsics\Arm\Sve2.cs" />
27272728
</ItemGroup>
27282729
<ItemGroup Condition="'$(SupportsArmIntrinsics)' != 'true'">
27292730
<Compile Include="$(MSBuildThisFileDirectory)System\Runtime\Intrinsics\Arm\AdvSimd.PlatformNotSupported.cs" />
@@ -2735,6 +2736,7 @@
27352736
<Compile Include="$(MSBuildThisFileDirectory)System\Runtime\Intrinsics\Arm\Sha1.PlatformNotSupported.cs" />
27362737
<Compile Include="$(MSBuildThisFileDirectory)System\Runtime\Intrinsics\Arm\Sha256.PlatformNotSupported.cs" />
27372738
<Compile Include="$(MSBuildThisFileDirectory)System\Runtime\Intrinsics\Arm\Sve.PlatformNotSupported.cs" />
2739+
<Compile Include="$(MSBuildThisFileDirectory)System\Runtime\Intrinsics\Arm\Sve2.PlatformNotSupported.cs" />
27382740
</ItemGroup>
27392741
<ItemGroup Condition="'$(SupportsWasmIntrinsics)' == 'true'">
27402742
<Compile Include="$(MSBuildThisFileDirectory)System\Runtime\Intrinsics\Wasm\WasmBase.cs" />

‎src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve2.PlatformNotSupported.cs‎

Lines changed: 81 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,81 @@
1+
// Licensed to the .NET Foundation under one or more agreements.
2+
// The .NET Foundation licenses this file to you under the MIT license.
3+
4+
using System.Diagnostics.CodeAnalysis;
5+
using System.Runtime.CompilerServices;
6+
using System.Runtime.Intrinsics;
7+
using System.Numerics;
8+
9+
namespace System.Runtime.Intrinsics.Arm
10+
{
11+
/// <summary>
12+
/// This class provides access to the ARM SVE hardware instructions via intrinsics
13+
/// </summary>
14+
[Intrinsic]
15+
[CLSCompliant(false)]
16+
[Experimental(Experimentals.ArmSveDiagId, UrlFormat = Experimentals.SharedUrlFormat)]
17+
public abstract class Sve2 : Sve
18+
{
19+
internal Sve2() { }
20+
21+
public static new bool IsSupported { get => IsSupported; }
22+
23+
[Intrinsic]
24+
public new abstract class Arm64 : Sve.Arm64
25+
{
26+
internal Arm64() { }
27+
28+
public static new bool IsSupported { get => IsSupported; }
29+
}
30+
31+
// Bitwise clear and exclusive OR
32+
33+
/// <summary>
34+
/// svuint8_t svbcax[_u8](svuint8_t op1, svuint8_t op2, svuint8_t op3)
35+
/// BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D
36+
/// </summary>
37+
public static unsafe Vector<byte> BitwiseClearXor(Vector<byte> xor, Vector<byte> value, Vector<byte> mask) { throw new PlatformNotSupportedException(); }
38+
39+
/// <summary>
40+
/// svint16_t svbcax[_s16](svint16_t op1, svint16_t op2, svint16_t op3)
41+
/// BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D
42+
/// </summary>
43+
public static unsafe Vector<short> BitwiseClearXor(Vector<short> xor, Vector<short> value, Vector<short> mask) { throw new PlatformNotSupportedException(); }
44+
45+
/// <summary>
46+
/// svint32_t svbcax[_s32](svint32_t op1, svint32_t op2, svint32_t op3)
47+
/// BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D
48+
/// </summary>
49+
public static unsafe Vector<int> BitwiseClearXor(Vector<int> xor, Vector<int> value, Vector<int> mask) { throw new PlatformNotSupportedException(); }
50+
51+
/// <summary>
52+
/// svint64_t svbcax[_s64](svint64_t op1, svint64_t op2, svint64_t op3)
53+
/// BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D
54+
/// </summary>
55+
public static unsafe Vector<long> BitwiseClearXor(Vector<long> xor, Vector<long> value, Vector<long> mask) { throw new PlatformNotSupportedException(); }
56+
57+
/// <summary>
58+
/// svint8_t svbcax[_s8](svint8_t op1, svint8_t op2, svint8_t op3)
59+
/// BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D
60+
/// </summary>
61+
public static unsafe Vector<sbyte> BitwiseClearXor(Vector<sbyte> xor, Vector<sbyte> value, Vector<sbyte> mask) { throw new PlatformNotSupportedException(); }
62+
63+
/// <summary>
64+
/// svuint16_t svbcax[_u16](svuint16_t op1, svuint16_t op2, svuint16_t op3)
65+
/// BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D
66+
/// </summary>
67+
public static unsafe Vector<ushort> BitwiseClearXor(Vector<ushort> xor, Vector<ushort> value, Vector<ushort> mask) { throw new PlatformNotSupportedException(); }
68+
69+
/// <summary>
70+
/// svuint32_t svbcax[_u32](svuint32_t op1, svuint32_t op2, svuint32_t op3)
71+
/// BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D
72+
/// </summary>
73+
public static unsafe Vector<uint> BitwiseClearXor(Vector<uint> xor, Vector<uint> value, Vector<uint> mask) { throw new PlatformNotSupportedException(); }
74+
75+
/// <summary>
76+
/// svuint64_t svbcax[_u64](svuint64_t op1, svuint64_t op2, svuint64_t op3)
77+
/// BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D
78+
/// </summary>
79+
public static unsafe Vector<ulong> BitwiseClearXor(Vector<ulong> xor, Vector<ulong> value, Vector<ulong> mask) { throw new PlatformNotSupportedException(); }
80+
}
81+
}

‎src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve2.cs‎

Lines changed: 81 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,81 @@
1+
// Licensed to the .NET Foundation under one or more agreements.
2+
// The .NET Foundation licenses this file to you under the MIT license.
3+
4+
using System.Diagnostics.CodeAnalysis;
5+
using System.Runtime.CompilerServices;
6+
using System.Runtime.Intrinsics;
7+
using System.Numerics;
8+
9+
namespace System.Runtime.Intrinsics.Arm
10+
{
11+
/// <summary>
12+
/// This class provides access to the ARM SVE hardware instructions via intrinsics
13+
/// </summary>
14+
[Intrinsic]
15+
[CLSCompliant(false)]
16+
[Experimental(Experimentals.ArmSveDiagId, UrlFormat = Experimentals.SharedUrlFormat)]
17+
public abstract class Sve2 : Sve
18+
{
19+
internal Sve2() { }
20+
21+
public static new bool IsSupported { get => IsSupported; }
22+
23+
[Intrinsic]
24+
public new abstract class Arm64 : Sve.Arm64
25+
{
26+
internal Arm64() { }
27+
28+
public static new bool IsSupported { get => IsSupported; }
29+
}
30+
31+
// Bitwise clear and exclusive OR
32+
33+
/// <summary>
34+
/// svuint8_t svbcax[_u8](svuint8_t op1, svuint8_t op2, svuint8_t op3)
35+
/// BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D
36+
/// </summary>
37+
public static unsafe Vector<byte> BitwiseClearXor(Vector<byte> xor, Vector<byte> value, Vector<byte> mask) => BitwiseClearXor(xor, value, mask);
38+
39+
/// <summary>
40+
/// svint16_t svbcax[_s16](svint16_t op1, svint16_t op2, svint16_t op3)
41+
/// BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D
42+
/// </summary>
43+
public static unsafe Vector<short> BitwiseClearXor(Vector<short> xor, Vector<short> value, Vector<short> mask) => BitwiseClearXor(xor, value, mask);
44+
45+
/// <summary>
46+
/// svint32_t svbcax[_s32](svint32_t op1, svint32_t op2, svint32_t op3)
47+
/// BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D
48+
/// </summary>
49+
public static unsafe Vector<int> BitwiseClearXor(Vector<int> xor, Vector<int> value, Vector<int> mask) => BitwiseClearXor(xor, value, mask);
50+
51+
/// <summary>
52+
/// svint64_t svbcax[_s64](svint64_t op1, svint64_t op2, svint64_t op3)
53+
/// BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D
54+
/// </summary>
55+
public static unsafe Vector<long> BitwiseClearXor(Vector<long> xor, Vector<long> value, Vector<long> mask) => BitwiseClearXor(xor, value, mask);
56+
57+
/// <summary>
58+
/// svint8_t svbcax[_s8](svint8_t op1, svint8_t op2, svint8_t op3)
59+
/// BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D
60+
/// </summary>
61+
public static unsafe Vector<sbyte> BitwiseClearXor(Vector<sbyte> xor, Vector<sbyte> value, Vector<sbyte> mask) => BitwiseClearXor(xor, value, mask);
62+
63+
/// <summary>
64+
/// svuint16_t svbcax[_u16](svuint16_t op1, svuint16_t op2, svuint16_t op3)
65+
/// BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D
66+
/// </summary>
67+
public static unsafe Vector<ushort> BitwiseClearXor(Vector<ushort> xor, Vector<ushort> value, Vector<ushort> mask) => BitwiseClearXor(xor, value, mask);
68+
69+
/// <summary>
70+
/// svuint32_t svbcax[_u32](svuint32_t op1, svuint32_t op2, svuint32_t op3)
71+
/// BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D
72+
/// </summary>
73+
public static unsafe Vector<uint> BitwiseClearXor(Vector<uint> xor, Vector<uint> value, Vector<uint> mask) => BitwiseClearXor(xor, value, mask);
74+
75+
/// <summary>
76+
/// svuint64_t svbcax[_u64](svuint64_t op1, svuint64_t op2, svuint64_t op3)
77+
/// BCAX Ztied1.D, Ztied1.D, Zop2.D, Zop3.D
78+
/// </summary>
79+
public static unsafe Vector<ulong> BitwiseClearXor(Vector<ulong> xor, Vector<ulong> value, Vector<ulong> mask) => BitwiseClearXor(xor, value, mask);
80+
}
81+
}

‎src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs‎

Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5975,6 +5975,28 @@ internal Arm64() { }
59755975
public static System.Numerics.Vector<ulong> ZipLow(System.Numerics.Vector<ulong> left, System.Numerics.Vector<ulong> right) { throw null; }
59765976
}
59775977

5978+
[System.CLSCompliantAttribute(false)]
5979+
[System.Diagnostics.CodeAnalysis.ExperimentalAttribute("SYSLIB5003", UrlFormat = "https://aka.ms/dotnet-warnings/{0}")]
5980+
public abstract partial class Sve2 : System.Runtime.Intrinsics.Arm.Sve
5981+
{
5982+
internal Sve2() { }
5983+
public static new bool IsSupported { get { throw null; } }
5984+
public new abstract partial class Arm64 : System.Runtime.Intrinsics.Arm.Sve.Arm64
5985+
{
5986+
internal Arm64() { }
5987+
public static new bool IsSupported { get { throw null; } }
5988+
}
5989+
5990+
public static System.Numerics.Vector<byte> BitwiseClearXor(System.Numerics.Vector<byte> xor, System.Numerics.Vector<byte> value, System.Numerics.Vector<byte> mask) { throw null; }
5991+
public static System.Numerics.Vector<short> BitwiseClearXor(System.Numerics.Vector<short> xor, System.Numerics.Vector<short> value, System.Numerics.Vector<short> mask) { throw null; }
5992+
public static System.Numerics.Vector<int> BitwiseClearXor(System.Numerics.Vector<int> xor, System.Numerics.Vector<int> value, System.Numerics.Vector<int> mask) { throw null; }
5993+
public static System.Numerics.Vector<long> BitwiseClearXor(System.Numerics.Vector<long> xor, System.Numerics.Vector<long> value, System.Numerics.Vector<long> mask) { throw null; }
5994+
public static System.Numerics.Vector<sbyte> BitwiseClearXor(System.Numerics.Vector<sbyte> xor, System.Numerics.Vector<sbyte> value, System.Numerics.Vector<sbyte> mask) { throw null; }
5995+
public static System.Numerics.Vector<ushort> BitwiseClearXor(System.Numerics.Vector<ushort> xor, System.Numerics.Vector<ushort> value, System.Numerics.Vector<ushort> mask) { throw null; }
5996+
public static System.Numerics.Vector<uint> BitwiseClearXor(System.Numerics.Vector<uint> xor, System.Numerics.Vector<uint> value, System.Numerics.Vector<uint> mask) { throw null; }
5997+
public static System.Numerics.Vector<ulong> BitwiseClearXor(System.Numerics.Vector<ulong> xor, System.Numerics.Vector<ulong> value, System.Numerics.Vector<ulong> mask) { throw null; }
5998+
}
5999+
59786000
public enum SveMaskPattern : byte
59796001
{
59806002
LargestPowerOf2 = 0, // The largest power of 2.

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