Fix GHDL and bump yosys-slang

Author: akashlevy

frontends/verific/verific.cc

@@ -3768,7 +3768,8 @@ struct VerificPass : public Pass {
 				if (!FileSystem::PathExists(ghdl_path.c_str())) ghdl_path = "ghdl";
 
 				// Run command to convert VHDL to Verilog
-				std::string top = filename_str.substr(0, std::string(FileSystem::Basename(filename)).find_last_of("."));
+				std::string basename = FileSystem::Basename(filename);
+				std::string top = filename_str.substr(basename.find_last_of("/")+1, basename.find_last_of(".")-basename.find_last_of("/")-1);
 				std::string outfile = "preqorsor/data/" + top + ".v";
 				std::string ghdl_cmd = ghdl_path + " --synth --no-formal -fsynopsys --out=verilog " + filename_str + " -e " + top + " > " + outfile;
 				log("Running command: %s\n", ghdl_cmd.c_str());