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| 1 | +// Copyright (c) 2024 PaddlePaddle Authors. All Rights Reserved. |
| 2 | +// |
| 3 | +// Licensed under the Apache License, Version 2.0 (the "License"); |
| 4 | +// you may not use this file except in compliance with the License. |
| 5 | +// You may obtain a copy of the License at |
| 6 | +// |
| 7 | +// http://www.apache.org/licenses/LICENSE-2.0 |
| 8 | +// |
| 9 | +// Unless required by applicable law or agreed to in writing, software |
| 10 | +// distributed under the License is distributed on an "AS IS" BASIS, |
| 11 | +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 12 | +// See the License for the specific language governing permissions and |
| 13 | +// limitations under the License. |
| 14 | + |
| 15 | +#include "paddle/phi/kernels/addmm_kernel.h" |
| 16 | +#include "paddle/phi/backends/xpu/enforce_xpu.h" |
| 17 | +#include "paddle/phi/backends/xpu/xpu_context.h" |
| 18 | +#include "paddle/phi/core/kernel_registry.h" |
| 19 | +#include "xblas/cublasLt.h" |
| 20 | + |
| 21 | +#ifndef PADDLE_WITH_XPU_XRE5 |
| 22 | +#include "paddle/phi/kernels/xpu/xpu_api_wrapper.h" |
| 23 | +#endif |
| 24 | + |
| 25 | +namespace xblas = baidu::xpu::xblas; |
| 26 | + |
| 27 | +namespace phi { |
| 28 | + |
| 29 | +template <typename T, typename Context> |
| 30 | +void AddmmKernel(const Context& dev_ctx, |
| 31 | + const DenseTensor& input, |
| 32 | + const DenseTensor& x, |
| 33 | + const DenseTensor& y, |
| 34 | + float beta, |
| 35 | + float alpha, |
| 36 | + DenseTensor* out) { |
| 37 | + using XPUType = typename XPUTypeTrait<T>::Type; |
| 38 | + |
| 39 | + auto input_dims = input.dims(); |
| 40 | + auto x_dims = x.dims(); |
| 41 | + auto y_dims = y.dims(); |
| 42 | + PADDLE_ENFORCE_EQ( |
| 43 | + input_dims.size() == 2 || input_dims.size() == 1, |
| 44 | + true, |
| 45 | + common::errors::InvalidArgument( |
| 46 | + "Variable 'input' of AddmmOp must be 1-dimensional or 2-dimensional, " |
| 47 | + "but received shape: [%s]", |
| 48 | + input_dims)); |
| 49 | + PADDLE_ENFORCE_EQ(x_dims.size() == 2, |
| 50 | + true, |
| 51 | + common::errors::InvalidArgument( |
| 52 | + "Variable 'x' of AddmmOp must be 2-dimensional, " |
| 53 | + "but received shape: [%s]", |
| 54 | + input_dims)); |
| 55 | + PADDLE_ENFORCE_EQ(y_dims.size() == 2, |
| 56 | + true, |
| 57 | + common::errors::InvalidArgument( |
| 58 | + "Variable 'y' of AddmmOp must be 2-dimensional, " |
| 59 | + "but received shape: [%s]", |
| 60 | + input_dims)); |
| 61 | + |
| 62 | + dev_ctx.template Alloc<T>(out); |
| 63 | + const XPUType* x_ptr = reinterpret_cast<const XPUType*>(x.data<T>()); |
| 64 | + const XPUType* y_ptr = reinterpret_cast<const XPUType*>(y.data<T>()); |
| 65 | + const XPUType* input_ptr = reinterpret_cast<const XPUType*>(input.data<T>()); |
| 66 | + XPUType* out_ptr = reinterpret_cast<XPUType*>(out->data<T>()); |
| 67 | + |
| 68 | + int r; |
| 69 | + if (alpha == 0.f) { |
| 70 | + if (beta == 0.f) { |
| 71 | + r = xpu::constant(dev_ctx.x_context(), |
| 72 | + out_ptr, |
| 73 | + out->numel(), |
| 74 | + static_cast<XPUType>(0.0f)); |
| 75 | + PADDLE_ENFORCE_XDNN_SUCCESS(r, "constant"); |
| 76 | + } else { |
| 77 | + xpu::ctx_guard RAII_GUARD(dev_ctx.x_context()); |
| 78 | + T* beta_xpu = RAII_GUARD.alloc_l3_or_gm<T>(1); |
| 79 | + r = xpu::constant(dev_ctx.x_context(), |
| 80 | + reinterpret_cast<XPUType*>(beta_xpu), |
| 81 | + out->numel(), |
| 82 | + static_cast<XPUType>(beta)); |
| 83 | + PADDLE_ENFORCE_XDNN_SUCCESS(r, "constant"); |
| 84 | + auto input_dims_vec = common::vectorize<int64_t>(input.dims()); |
| 85 | + auto out_dims_vec = common::vectorize<int64_t>(out->dims()); |
| 86 | + r = xpu::broadcast_mul<XPUType>(dev_ctx.x_context(), |
| 87 | + input_ptr, |
| 88 | + reinterpret_cast<XPUType*>(beta_xpu), |
| 89 | + out_ptr, |
| 90 | + input_dims_vec, |
| 91 | + out_dims_vec); |
| 92 | + PADDLE_ENFORCE_XDNN_SUCCESS(r, "broadcast_mul"); |
| 93 | + } |
| 94 | +#ifdef PADDLE_WITH_XPU_XRE5 |
| 95 | + } else { |
| 96 | + xblas::FcFusionTensor<const XPUType> t_input{ |
| 97 | + input_ptr, |
| 98 | + nullptr, |
| 99 | + input.dims()[0], |
| 100 | + input.dims()[1], |
| 101 | + input.dims()[1], |
| 102 | + false, |
| 103 | + }; |
| 104 | + xblas::FcFusionTensor<const XPUType> t_x{ |
| 105 | + x_ptr, |
| 106 | + nullptr, |
| 107 | + x.dims()[0], |
| 108 | + x.dims()[1], |
| 109 | + x.dims()[1], |
| 110 | + false, |
| 111 | + }; |
| 112 | + xblas::FcFusionTensor<const XPUType> t_y{ |
| 113 | + y_ptr, |
| 114 | + nullptr, |
| 115 | + y.dims()[0], |
| 116 | + y.dims()[1], |
| 117 | + y.dims()[1], |
| 118 | + false, |
| 119 | + }; |
| 120 | + xblas::FcFusionTensor<XPUType> t_out{ |
| 121 | + out_ptr, |
| 122 | + nullptr, |
| 123 | + out->dims()[0], |
| 124 | + out->dims()[1], |
| 125 | + out->dims()[1], |
| 126 | + false, |
| 127 | + }; |
| 128 | + xblas::FcFusionDesc<float, float, XPUType> desc{ |
| 129 | + alpha, |
| 130 | + beta, |
| 131 | + }; |
| 132 | + xblas::FcFusionEpilogue<float, float> epilogue{ |
| 133 | + xdnn::Activation_t::LINEAR, |
| 134 | + nullptr, |
| 135 | + nullptr, |
| 136 | + nullptr, |
| 137 | + 0, |
| 138 | + 0, |
| 139 | + nullptr, |
| 140 | + }; |
| 141 | + r = xblas::fc_fusion<XPUType, |
| 142 | + XPUType, |
| 143 | + XPUType, |
| 144 | + XPUType, |
| 145 | + float, |
| 146 | + float, |
| 147 | + XPUType, |
| 148 | + float, |
| 149 | + float>( |
| 150 | + dev_ctx.x_context(), t_x, t_y, t_input, t_out, desc, epilogue); |
| 151 | + PADDLE_ENFORCE_XDNN_SUCCESS(r, "fc_fusion"); |
| 152 | +#else |
| 153 | + } else { |
| 154 | + Copy(dev_ctx, input, dev_ctx.GetPlace(), false, out); |
| 155 | + XpuFcInfo fc_info; |
| 156 | + GetFCInfo(x_dims, y_dims, false, false, &fc_info); |
| 157 | + MatMulXPUFunction<XPUType>( |
| 158 | + dev_ctx.x_context(), x_ptr, y_ptr, out_ptr, fc_info, alpha, beta); |
| 159 | +#endif |
| 160 | + } |
| 161 | +} |
| 162 | +} // namespace phi |
| 163 | + |
| 164 | +PD_REGISTER_KERNEL(addmm, |
| 165 | + XPU, |
| 166 | + ALL_LAYOUT, |
| 167 | + phi::AddmmKernel, |
| 168 | + float, |
| 169 | + phi::dtype::bfloat16, |
| 170 | + phi::dtype::float16) {} |
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