RISC-V: add support for the Zfinx, Zhinx, Zfinx, Zfhmin and Zhinxmin ISA extensions.

Author: CensoredUsername

doc/langref_riscv.md

@@ -322,9 +322,14 @@ Dynasm-rs currently supports the following ratified RISC-V instruction set exten
 - `Zcmop`: compressed may-be-operations
 - `Zcmp`: microcoded push/pop operations
 - `Zcmt`: table jumps
+- `Zdinx`: double floating point integer registers.
 - `Zfa`: additional floating point instructions
 - `Zfbfmin`: scalar convert to/from BF16
 - `Zfh`: half floating point support
+- `Zfhmin`: half floating point support: conversion only
+- `Zfinx`: floating point in integer registers
+- `Zhinx`: half floating point in integer registers
+- `Zhinxmin`: half floating point in integer registers: conversion only
 - `Zicbom`: cache block operations: management
 - `Zicbop`: cache block operations: prefetching
 - `Zicboz`: cache block operations: zero
@@ -334,7 +339,7 @@ Dynasm-rs currently supports the following ratified RISC-V instruction set exten
 - `Zicond`: integer conditional operations
 - `Zicsr`: control and status registers
 - `Zifencei`: data to instruction cache fence
-- `Zihintntl`: non temporal load hints
+- `Zihintntl`: non temporal locality hints
 - `Zihintpause`: pause hint
 - `Zimop`: may-be-operations
 - `Zk`: Scalar cryptography

plugin/src/arch/riscv/mod.rs

@@ -270,6 +270,16 @@ fn parse_features(features: &[syn::Ident]) -> riscvdata::ExtensionFlags {
             split.insert("zifencei");
         }
 
+        // expand b to Zba_Zbb_Zbs
+        if split.remove(&"b") {
+            split.insert("zba");
+            split.insert("zbb");
+            split.insert("zbs");
+        }
+
+        // remove Ztso as it doesn't add instructions
+        split.remove(&"ztso");
+
         // many extensions
         for s in split.into_iter() {
             let flag = match s {
@@ -294,9 +304,14 @@ fn parse_features(features: &[syn::Ident]) -> riscvdata::ExtensionFlags {
                 "zcmop" => riscvdata::ExtensionFlags::Ex_Zcmop,
                 "zcmp" => riscvdata::ExtensionFlags::Ex_Zcmp,
                 "zcmt" => riscvdata::ExtensionFlags::Ex_Zcmt,
+                "zdinx" => riscvdata::ExtensionFlags::Ex_Zdinx,
                 "zfa" => riscvdata::ExtensionFlags::Ex_Zfa,
                 "zfbfmin" => riscvdata::ExtensionFlags::Ex_Zfbfmin,
                 "zfh" => riscvdata::ExtensionFlags::Ex_Zfh,
+                "zfhmin" => riscvdata::ExtensionFlags::Ex_Zfhmin,
+                "zfinx" => riscvdata::ExtensionFlags::Ex_Zfinx,
+                "zhinx" => riscvdata::ExtensionFlags::Ex_Zhinx,
+                "zhinxmin" => riscvdata::ExtensionFlags::Ex_Zhinxmin,
                 "zicbom" => riscvdata::ExtensionFlags::Ex_Zicbom,
                 "zicbop" => riscvdata::ExtensionFlags::Ex_Zicbop,
                 "zicboz" => riscvdata::ExtensionFlags::Ex_Zicboz,